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| author | Martin Roth <martinroth@google.com> | 2016-07-29 14:07:30 -0600 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2016-08-01 21:44:45 +0200 |
| commit | 0cd338e6e489eacfedb8fab3ff161b1578d08f07 (patch) | |
| tree | 8b729260de5a406dc22869ff5c5236ba77fbb0ed /src/mainboard/via | |
| parent | bb9722bd775d575401edff14a9b80406ecbd974a (diff) | |
| download | coreboot-0cd338e6e489eacfedb8fab3ff161b1578d08f07.tar.xz | |
Remove non-ascii & unprintable characters
These non-ascii & unprintable characters aren't needed.
Change-Id: I129f729f66d6a692de729d76971f7deb7a19c254
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15977
Tested-by: build bot (Jenkins)
Reviewed-by: Omar Pakker
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/via')
| -rw-r--r-- | src/mainboard/via/epia-m700/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c index 9f2c14e3bf..83af4260f2 100644 --- a/src/mainboard/via/epia-m700/romstage.c +++ b/src/mainboard/via/epia-m700/romstage.c @@ -187,7 +187,7 @@ static const struct VIA_PCI_REG_INIT_TABLE mNbStage1InitTbl[] = { /* VT3409 no PCI-E */ { 0x00, 0xFF, NB_APIC_REG(0x61), 0xFF, 0x0E }, // Set Exxxxxxx as pcie mmio config range { 0x00, 0xFF, NB_APIC_REG(0x60), 0xF4, 0x0B }, // Support extended cfg address of pcie - // { 0x00, 0xFF, NB_APIC_REG(0x42), 0xF9, 0x02 }, // APIC Interrupt((BT_INTR)) Control + // { 0x00, 0xFF, NB_APIC_REG(0x42), 0xF9, 0x02 }, // APIC Interrupt((BT_INTR)) Control // Set ROMSIP value by software /* |