summaryrefslogtreecommitdiff
path: root/src/mainboard/via
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2008-03-18 23:10:24 +0000
committerStefan Reinauer <stepan@openbios.org>2008-03-18 23:10:24 +0000
commitcfcc9ca59047a19dd01953c1d906947e2c78ca6a (patch)
tree379510c1615120fa45470916a72e453989499cff /src/mainboard/via
parente98edfa38637166002a50714dd0db9beef6c7054 (diff)
downloadcoreboot-cfcc9ca59047a19dd01953c1d906947e2c78ca6a.tar.xz
* split model_centaur into model_c3 and model_c7
* simplify and improve cpuid table * add speedstep support for VIA C7 based CPUs * also included as many of Uwe's suggestions as possible Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3168 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via')
-rw-r--r--src/mainboard/via/epia-m/Config.lb2
-rw-r--r--src/mainboard/via/epia/Config.lb2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/via/epia-m/Config.lb b/src/mainboard/via/epia-m/Config.lb
index c8537e0425..295cecb5e8 100644
--- a/src/mainboard/via/epia-m/Config.lb
+++ b/src/mainboard/via/epia-m/Config.lb
@@ -134,7 +134,7 @@ config chip.h
chip northbridge/via/vt8623
device apic_cluster 0 on
- chip cpu/via/model_centaur
+ chip cpu/via/model_c3
device apic 0 on end
end
end
diff --git a/src/mainboard/via/epia/Config.lb b/src/mainboard/via/epia/Config.lb
index 9c354f7350..1daff5bb67 100644
--- a/src/mainboard/via/epia/Config.lb
+++ b/src/mainboard/via/epia/Config.lb
@@ -184,7 +184,7 @@ chip northbridge/via/vt8601
end
device apic_cluster 0 on
- chip cpu/via/model_centaur
+ chip cpu/via/model_c3
device apic 0 on end
end
end