epia-m support

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1655 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

5 files changed, 252 insertions, 24 deletions

diff --git a/src/mainboard/via/epia-m/Config.lb b/src/mainboard/via/epia-m/Config.lb
index ed43611162..8438fcf23b 100644
--- a/src/mainboard/via/epia-m/Config.lb
+++ b/src/mainboard/via/epia-m/Config.lb
@@ -23,6 +23,7 @@ uses _ROMBASE
 uses XIP_ROM_SIZE
 uses XIP_ROM_BASE
 uses HAVE_MP_TABLE
+uses HAVE_ACPI_TABLES
 
 ## ROM_SIZE is the size of boot ROM that this board will use.
 default ROM_SIZE  = 256*1024
@@ -130,6 +131,11 @@ arch i386 end
 driver mainboard.o
 #object reset.o
 
+if HAVE_ACPI_TABLES
+	object fadt.o
+	object dsdt.o
+end
+
 ##
 ## Romcc output
 ##
@@ -218,6 +224,14 @@ northbridge via/vt8623 "vt8623"
 		register "enable_keyboard" = "0"
 		register "enable_nvram" = "1"
 	end
+	southbridge ricoh/rl5c476 "rl5c476"
+	end
+	superio via/vt1211 "vt1211"
+		register "enable_com_ports" = "1"
+		register "enable_hwmon" = "1"
+		register "enable_lpt" = "1"
+		register "enable_fdc" = "1"
+	end
 end
 
 cpu p6 "cpu0"
diff --git a/src/mainboard/via/epia-m/auto.c b/src/mainboard/via/epia-m/auto.c
index 88523ed9e9..6fbc8306a4 100644
--- a/src/mainboard/via/epia-m/auto.c
+++ b/src/mainboard/via/epia-m/auto.c
@@ -49,7 +49,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 
 
-#include "northbridge/via/vt8601/raminit.c"
+#include "northbridge/via/vt8623/raminit.c"
 /*
   #include "sdram/generic_sdram.c"
 */
@@ -64,8 +64,9 @@ static void enable_mainboard_devices(void)
 	if (dev == PCI_DEV_INVALID) {
 		die("Southbridge not found!!!\n");
 	}
-	pci_write_config8(dev, 0x50, 7);
-	pci_write_config8(dev, 0x51, 0xff);
+	pci_write_config8(dev, 0x50, 0);
+	pci_write_config8(dev, 0x51, 0xfd);
+	pci_write_config8(dev, 0x94, 0xb2);
 #if 0
 	// This early setup switches IDE into compatibility mode before PCI gets 
 	// // a chance to assign I/Os
@@ -97,9 +98,15 @@ static void enable_shadow_ram(void)
 static void main(void)
 {
 	unsigned long x;
+	device_t dev;
 	/*	init_timer();*/
 	outb(5, 0x80);
+
 	
+	pci_write_config8( 0xd*8,0x15,0x1c);
+	pci_write_config8( 0 , 0xe1, 0xdd);
+ 
+	outb(5, 0x80);	
 	enable_smbus();
 	enable_vt8235_serial();
 
diff --git a/src/mainboard/via/epia-m/fadt.c b/src/mainboard/via/epia-m/fadt.c
new file mode 100644
index 0000000000..702d556988
--- /dev/null
+++ b/src/mainboard/via/epia-m/fadt.c
@@ -0,0 +1,155 @@
+/*
+ * ACPI - create the Fixed ACPI Description Tables (FADT)
+ * (C) Copyright 2004 Nick Barker <nick.barker9@btinternet.com>
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <string.h>
+#include <arch/acpi.h>
+
+void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){
+	acpi_header_t *header=&(fadt->header);
+
+	memset((void *)fadt,0,sizeof(acpi_fadt_t));
+	memcpy(header->signature,"FACP",4);
+	header->length = 244;
+	header->revision = 1;
+	memcpy(header->oem_id,"LXBIOS",6);
+	memcpy(header->oem_table_id,"LXBACPI ",8);
+	memcpy(header->asl_compiler_id,"LXB",8);
+	header->asl_compiler_revision=0;
+
+	fadt->firmware_ctrl=facs;
+	fadt->dsdt= dsdt;
+	fadt->preferred_pm_profile=0;
+	fadt->sci_int=5;
+	fadt->smi_cmd = 0;
+	fadt->acpi_enable = 0;
+	fadt->acpi_disable = 0;
+	fadt->s4bios_req = 0x0;
+	fadt->pstate_cnt = 0x0;
+
+	fadt->pm1a_evt_blk = 0x400;
+	fadt->pm1b_evt_blk = 0x0;
+	fadt->pm1a_cnt_blk = 0x404;
+	fadt->pm1b_cnt_blk = 0x0;
+	fadt->pm2_cnt_blk = 0x0;
+	fadt->pm_tmr_blk = 0x408;
+	fadt->gpe0_blk = 0x420;
+	fadt->gpe1_blk = 0x0;
+
+	fadt->pm1_evt_len = 4;
+	fadt->pm1_cnt_len = 2;
+	fadt->pm2_cnt_len = 0;
+	fadt->pm_tmr_len = 4;
+	fadt->gpe0_blk_len = 4;
+	fadt->gpe1_blk_len = 0;
+	fadt->gpe1_base = 0;
+	fadt->cst_cnt = 0;
+	fadt->p_lvl2_lat = 90;
+	fadt->p_lvl3_lat = 900;
+	fadt->flush_size = 0;
+	fadt->flush_stride = 0;
+	fadt->duty_offset = 0;
+	fadt->duty_width = 1;
+	fadt->day_alrm = 125;
+	fadt->mon_alrm = 126;
+	fadt->century = 50;
+	fadt->iapc_boot_arch = 0x1;
+	fadt->flags = 0x4a5;
+
+	fadt->reset_reg.space_id = 0;
+	fadt->reset_reg.bit_width = 0;
+	fadt->reset_reg.bit_offset = 0;
+	fadt->reset_reg.resv = 0;
+	fadt->reset_reg.addrl = 0x0;
+	fadt->reset_reg.addrh = 0x0;
+
+	fadt->reset_value = 0;
+	fadt->x_firmware_ctl_l = facs;
+	fadt->x_firmware_ctl_h = 0;
+	fadt->x_dsdt_l = dsdt;
+	fadt->x_dsdt_h = 0;
+
+	fadt->x_pm1a_evt_blk.space_id = 1;
+	fadt->x_pm1a_evt_blk.bit_width = 4;
+	fadt->x_pm1a_evt_blk.bit_offset = 0;
+	fadt->x_pm1a_evt_blk.resv = 0;
+	fadt->x_pm1a_evt_blk.addrl = 0x400;
+	fadt->x_pm1a_evt_blk.addrh = 0x0;
+
+
+	fadt->x_pm1b_evt_blk.space_id = 1;
+	fadt->x_pm1b_evt_blk.bit_width = 4;
+	fadt->x_pm1b_evt_blk.bit_offset = 0;
+	fadt->x_pm1b_evt_blk.resv = 0;
+	fadt->x_pm1b_evt_blk.addrl = 0x0;
+	fadt->x_pm1b_evt_blk.addrh = 0x0;
+
+
+	fadt->x_pm1a_cnt_blk.space_id = 1;
+	fadt->x_pm1a_cnt_blk.bit_width = 2;
+	fadt->x_pm1a_cnt_blk.bit_offset = 0;
+	fadt->x_pm1a_cnt_blk.resv = 0;
+	fadt->x_pm1a_cnt_blk.addrl = 0x404;
+	fadt->x_pm1a_cnt_blk.addrh = 0x0;
+
+
+	fadt->x_pm1b_cnt_blk.space_id = 1;
+	fadt->x_pm1b_cnt_blk.bit_width = 2;
+	fadt->x_pm1b_cnt_blk.bit_offset = 0;
+	fadt->x_pm1b_cnt_blk.resv = 0;
+	fadt->x_pm1b_cnt_blk.addrl = 0x0;
+	fadt->x_pm1b_cnt_blk.addrh = 0x0;
+
+
+	fadt->x_pm2_cnt_blk.space_id = 1;
+	fadt->x_pm2_cnt_blk.bit_width = 0;
+	fadt->x_pm2_cnt_blk.bit_offset = 0;
+	fadt->x_pm2_cnt_blk.resv = 0;
+	fadt->x_pm2_cnt_blk.addrl = 0x0;
+	fadt->x_pm2_cnt_blk.addrh = 0x0;
+
+
+	fadt->x_pm_tmr_blk.space_id = 1;
+	fadt->x_pm_tmr_blk.bit_width = 4;
+	fadt->x_pm_tmr_blk.bit_offset = 0;
+	fadt->x_pm_tmr_blk.resv = 0;
+	fadt->x_pm_tmr_blk.addrl = 0x408;
+	fadt->x_pm_tmr_blk.addrh = 0x0;
+
+
+	fadt->x_gpe0_blk.space_id = 1;
+	fadt->x_gpe0_blk.bit_width = 0;
+	fadt->x_gpe0_blk.bit_offset = 0;
+	fadt->x_gpe0_blk.resv = 0;
+	fadt->x_gpe0_blk.addrl = 0x420;
+	fadt->x_gpe0_blk.addrh = 0x0;
+
+
+	fadt->x_gpe1_blk.space_id = 1;
+	fadt->x_gpe1_blk.bit_width = 0;
+	fadt->x_gpe1_blk.bit_offset = 0;
+	fadt->x_gpe1_blk.resv = 0;
+	fadt->x_gpe1_blk.addrl = 0x0;
+	fadt->x_gpe1_blk.addrh = 0x0;
+
+	header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t));
+
+}
diff --git a/src/mainboard/via/epia-m/irq_tables.c b/src/mainboard/via/epia-m/irq_tables.c
index 894c27dec5..8e8aadcbf4 100644
--- a/src/mainboard/via/epia-m/irq_tables.c
+++ b/src/mainboard/via/epia-m/irq_tables.c
@@ -1,32 +1,30 @@
 /* This file was generated by getpir.c, do not modify! 
    (but if you do, please run checkpir on it to verify)
-   Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
-
-   Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
+ * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
+ *
+ * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
 */
 
 #include <arch/pirq_routing.h>
 
 const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE, /* u32 signature */
-	PIRQ_VERSION,   /* u16 version   */
-	32+16*5,        /* there can be total 5 devices on the bus */
-	0,              /* Where the interrupt router lies (bus) */
-	0x88,           /* Where the interrupt router lies (dev) */
-	0x1c20,         /* IRQs devoted exclusively to PCI usage */
-	0x1106,         /* Vendor */
-	0x8231,         /* Device */
-	0,              /* Crap (miniport) */
+	PIRQ_SIGNATURE,  /* u32 signature */
+	PIRQ_VERSION,    /* u16 version   */
+	32+16*5,	 /* there can be total 5 devices on the bus */
+	0x00,		 /* Where the interrupt router lies (bus) */
+	(0x00<<3)|0x0,   /* Where the interrupt router lies (dev) */
+	0xc20,		 /* IRQs devoted exclusively to PCI usage */
+	0,		 /* Vendor */
+	0,		 /* Device */
+	0,		 /* Crap (miniport) */
 	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0x5e,         /*  u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
+	0x68,         /*  u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
 	{
-		/* 8231 ethernet */
-		{0,0x90, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x1, 0},
-		/* 8231 internal */
-		{0,0x88, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x2, 0},
-		/* PCI slot */
-		{0,0xa0, {{0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}}, 0, 0},
-		{0,0x50, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x3, 0},
-		{0,0x98, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x4, 0},
+		/* bus,     dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
+		{0x00,(0x14<<3)|0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0x0deb8}}, 0x1, 0x0},
+		{0x00,(0x13<<3)|0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0x0deb8}}, 0x2, 0x0},
+		{0x00,(0x0a<<3)|0x0, {{0x04, 0xdeb8}, {0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0x0deb8}}, 0x3, 0x0},
+		{0x00,(0x0d<<3)|0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0x0deb8}}, 0x4, 0x0},
+		{0x00,(0x01<<3)|0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0x0deb8}}, 0x0, 0x0},
 	}
 };
diff --git a/src/mainboard/via/epia-m/mainboard.c b/src/mainboard/via/epia-m/mainboard.c
index 747eb3eb7f..9597392593 100644
--- a/src/mainboard/via/epia-m/mainboard.c
+++ b/src/mainboard/via/epia-m/mainboard.c
@@ -9,6 +9,9 @@
 #include <device/chip.h>
 #include "chip.h"
 
+void vga_enable_console();
+
+
 static int
 mainboard_scan_bus(device_t root, int maxbus) 
 {
@@ -19,6 +22,56 @@ mainboard_scan_bus(device_t root, int maxbus)
 	return maxbus;
 }
 
+void vga_fixup(void) {
+        // we do this right here because:
+        // - all the hardware is working, and some VGA bioses seem to need
+        //   that
+        // - we need page 0 below for linuxbios tables.
+
+        printk_debug("INSTALL REAL-MODE IDT\n");
+        setup_realmode_idt();
+        printk_debug("DO THE VGA BIOS\n");
+        do_vgabios();
+        post_code(0x93);
+	vga_enable_console();
+
+
+}
+ 
+void write_protect_vgabios(void)
+{
+ 	device_t dev;
+ 
+ 	printk_info("write_protect_vgabios\n");
+ 	dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3123, 0);
+ 	if(dev)
+ 		pci_write_config8(dev, 0x61, 0xaa);
+ 
+}
+
+static void
+enable(struct chip *chip, enum chip_pass pass)
+{
+
+        struct mainboard_tyan_s4882_config *conf = 
+		(struct mainboard_tyan_s4882_config *)chip->chip_info;
+
+        switch (pass) {
+		default: break;
+//		case CONF_PASS_PRE_CONSOLE:
+//		case CONF_PASS_PRE_PCI:
+		case CONF_PASS_POST_PCI:		
+//                case CONF_PASS_PRE_BOOT:
+//			if (conf->fixup_scsi)
+//        			onboard_scsi_fixup();
+//			if (conf->fixup_vga)
+//				vga_fixup();
+			printk_debug("mainboard fixup pass %d done\r\n",
+					pass);
+			break;
+	}
+
+}
 static struct device_operations mainboard_operations = {
 	.read_resources   = root_dev_read_resources,
 	.set_resources    = root_dev_set_resources,
@@ -41,5 +94,6 @@ static void enumerate(struct chip *chip)
 struct chip_control mainboard_via_epia_m_control = {
 	.enumerate = enumerate, 
 	.name      = "VIA EPIA-M mainboard ",
+	.enable = enable
 };