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| author | Ronald G. Minnich <rminnich@gmail.com> | 2008-11-03 04:08:35 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2008-11-03 04:08:35 +0000 |
| commit | d4ef0541dbd198defc2fcd95c2e412d828dafe26 (patch) | |
| tree | b451ac0529d2e896d98b96f6ca0699c0fed6bc48 /src/mainboard/via | |
| parent | 6f31f110319418cb7c63132090f7970e3425862a (diff) | |
| download | coreboot-d4ef0541dbd198defc2fcd95c2e412d828dafe26.tar.xz | |
modify pirq tables for epia-cn.
Not tested, builds, derived from getpir. Definitely better than what was there.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Bari Ari <bari@onelabs.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3724 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via')
| -rw-r--r-- | src/mainboard/via/epia-cn/Options.lb | 2 | ||||
| -rw-r--r-- | src/mainboard/via/epia-cn/irq_tables.c | 23 |
2 files changed, 12 insertions, 13 deletions
diff --git a/src/mainboard/via/epia-cn/Options.lb b/src/mainboard/via/epia-cn/Options.lb index 7d392c4b84..b29862c058 100644 --- a/src/mainboard/via/epia-cn/Options.lb +++ b/src/mainboard/via/epia-cn/Options.lb @@ -81,7 +81,7 @@ default CONFIG_UDELAY_TSC = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 default HAVE_HARD_RESET = 0 default HAVE_PIRQ_TABLE = 1 -default IRQ_SLOT_COUNT = 10 +default IRQ_SLOT_COUNT = 9 default HAVE_ACPI_TABLES = 0 default HAVE_OPTION_TABLE = 1 default ROM_IMAGE_SIZE = 64 * 1024 diff --git a/src/mainboard/via/epia-cn/irq_tables.c b/src/mainboard/via/epia-cn/irq_tables.c index fef553e219..fc63ff1c32 100644 --- a/src/mainboard/via/epia-cn/irq_tables.c +++ b/src/mainboard/via/epia-cn/irq_tables.c @@ -27,24 +27,23 @@ const struct irq_routing_table intel_irq_routing_table = { 32 + 16 * IRQ_SLOT_COUNT,/* Max. number of devices on the bus */ 0x00, /* Interrupt router bus */ (0x11 << 3) | 0x0, /* Interrupt router device */ - 0x828, /* IRQs devoted exclusively to PCI usage */ + 0xc20, /* IRQs devoted exclusively to PCI usage */ 0x1106, /* Vendor */ 0x596, /* Device */ 0, /* Crap (miniport) */ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x3e, /* Checksum */ + 0x66, /* Checksum */ { /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00,(0x08<<3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x1, 0x0}, - {0x00,(0x09<<3)|0x0, {{0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0xdef8}, {0x01, 0x0def8}}, 0x2, 0x0}, - {0x00,(0x0a<<3)|0x0, {{0x03, 0xdef8}, {0x05, 0xdef8}, {0x01, 0xdef8}, {0x02, 0x0def8}}, 0x3, 0x0}, - {0x00,(0x0b<<3)|0x0, {{0x05, 0xdef8}, {0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0x0def8}}, 0x4, 0x0}, - {0x00,(0x0c<<3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x5, 0x0}, - {0x00,(0x11<<3)|0x0, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0}, - {0x00,(0x0f<<3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0}, - {0x00,(0x01<<3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0}, - {0x00,(0x10<<3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0}, - {0x00,(0x12<<3)|0x0, {{0x01, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, + {0x00,(0x14<<3)|0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0xdeb8}, {0x01, 0x0deb8}}, 0x1, 0x0}, + {0x00,(0x0d<<3)|0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0xdeb8}, {0x01, 0x0deb8}}, 0x2, 0x0}, + {0x00,(0x0e<<3)|0x0, {{0x03, 0xdeb8}, {0x05, 0xdeb8}, {0x01, 0xdeb8}, {0x02, 0x0deb8}}, 0x3, 0x0}, + {0x00,(0x13<<3)|0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0x0deb8}}, 0x4, 0x0}, + {0x00,(0x11<<3)|0x0, {{0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0x0deb8}}, 0x0, 0x0}, + {0x00,(0x0f<<3)|0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0x0deb8}}, 0x0, 0x0}, + {0x00,(0x01<<3)|0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0x0deb8}}, 0x0, 0x0}, + {0x00,(0x10<<3)|0x0, {{0x01, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x05, 0x0deb8}}, 0x0, 0x0}, + {0x00,(0x12<<3)|0x0, {{0x01, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, } }; |