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authorLubomir Rintel <lkundrak@v3.sk>2017-12-28 01:48:09 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2018-05-16 06:19:34 +0000
commitd8ec973fd24e091d0038d7060bfb516bad7534f0 (patch)
tree0945e83c1648cf6dc10569d863543b01de4362e8 /src/mainboard/via
parentfaafbfb81e28df373d3319a6378e73cb37c9ced3 (diff)
downloadcoreboot-d8ec973fd24e091d0038d7060bfb516bad7534f0.tar.xz
vx900: Move to EARLY_CBMEM_INIT
To calculate the CBMEM address we need to determine the framebuffer size early in the ROMSTAGE. We now do the calculation before cbmem_recovery() and configure the memory controller right away. If the calculation was done from cbmem_top() instead, we'd loose some logging that seems useful, since printk() would recurse to cbmem_top() too with CONSOLE_CBMEM enabled. If we didn't configure the memory controller at this point, we'd need to store the result somewhere else. However, CAR_GLOBAL is not practical at this point, because calling car_get_var() from cbmem_top() would recurse back to cbmem_top(). Change-Id: Ib9ae0f97f9f769a20a610f8d76f14165fb924042 Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/25798 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/via')
-rw-r--r--src/mainboard/via/epia-m850/romstage.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c
index f16b9b08cc..e75a679f2e 100644
--- a/src/mainboard/via/epia-m850/romstage.c
+++ b/src/mainboard/via/epia-m850/romstage.c
@@ -80,7 +80,7 @@ void main(unsigned long bist)
ram_check((1 << 24), 0x80);
ram_check((512 + 256 - 1) << 20, 0x80);
ram_check(0x80c0000, 0x80);
- tolm = ((pci_read_config16(MCU, 0x84) & 0xfff0) >> 4) << 20;
+ tolm = vx900_get_tolm () << 20;
if (tolm > (1 * (u32) GiB))
ram_check(1024 << 10, 0x80);
if (tolm > (2 * (u32) GiB))
@@ -88,10 +88,13 @@ void main(unsigned long bist)
printk(BIOS_DEBUG, "We passed RAM verify\n");
+ /* FIXME: read fb_size from CMOS, but until that is implemented, start
+ * from 512MB */
+ vx900_set_chrome9hd_fb_size (512);
+
/* We got RAM working, now we can write the timestamps to RAM */
-#if IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)
cbmem_recovery(0);
-#endif
+
/* FIXME: See if this is needed or take this out please */
/* Disable Memcard and SDIO */
pci_mod_config8(LPC, 0x51, 0, (1 << 7) | (1 << 4));