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| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-31 19:37:50 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-10-31 19:37:50 +0000 |
| commit | f9892166d548d523911263a4a2a550cd03a3309d (patch) | |
| tree | c3112387300c4678d862885ab1d6228248430fbe /src/mainboard/via | |
| parent | 27612ed4f28dd29eecbae6d20ed137d03ca5bbdf (diff) | |
| download | coreboot-f9892166d548d523911263a4a2a550cd03a3309d.tar.xz | |
Remove incorrect IOAPIC lines from some mptable.c files.
- via/epia-n/mptable.c
- intel/eagleheights/mptable.c (commented out anyway)
- asus/p2b-d/mptable.c
- asus/p2b-ds/mptable.c
Some files still incorrectly contain some smp_write_ioapic() lines from
the original mptable utility target (Supermicro P4DPE), which has one
IOAPIC in the southbridge (Intel ICH3-S), two IOAPICs contained in
the first P64H2, and two more in the second P64H2, i.e. 5 IOAPICs in total.
However, none of the boards where this chunk of code is present has
multiple IOAPICs (and even if they had, the PCI devices where those are
located would probably be different anyway), so drop the incorrect
mptable.c contents.
Also drop the lines from the mptable utility, so that future mptable.c files
don't incorrectly inherit any of this stuff.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Jonathan Kollasch <jakllsch@kollasch.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/via')
| -rw-r--r-- | src/mainboard/via/epia-n/mptable.c | 33 |
1 files changed, 1 insertions, 32 deletions
diff --git a/src/mainboard/via/epia-n/mptable.c b/src/mainboard/via/epia-n/mptable.c index 9ffa2b1765..dc8ef2780c 100644 --- a/src/mainboard/via/epia-n/mptable.c +++ b/src/mainboard/via/epia-n/mptable.c @@ -21,38 +21,7 @@ static void *smp_write_config_table(void *v) /*I/O APICs: APIC ID Version State Address*/ smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR); - { - device_t dev; - struct resource *res; - dev = dev_find_slot(1, PCI_DEVFN(0x1e,0)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, 3, 0x20, res->base); - } - } - dev = dev_find_slot(1, PCI_DEVFN(0x1c,0)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, 4, 0x20, res->base); - } - } - dev = dev_find_slot(4, PCI_DEVFN(0x1e,0)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, 5, 0x20, res->base); - } - } - dev = dev_find_slot(4, PCI_DEVFN(0x1c,0)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, 8, 0x20, res->base); - } - } - } + mptable_add_isa_interrupts(mc, isa_bus, 0x2, 0); /*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ |