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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-04-27 00:41:50 +1000
committerRudolf Marek <r.marek@assembler.cz>2014-05-11 17:52:08 +0200
commitf29200240e428761827ab8d179fa23068bfa9d59 (patch)
treee8f20cf76e224a08152c46196894479bd6105436 /src/mainboard/via
parent946bee1c349db6bf88b4f6736dc910eb4890a74b (diff)
downloadcoreboot-f29200240e428761827ab8d179fa23068bfa9d59.tar.xz
superio/ite/*: Factor out generic romstage component
Following the reasoning of: cf7b498 superio/fintek/*: Factor out generic romstage component Change-Id: I4c0a9a5a7786eb8fcb0c3ed6251c7fe9bbbadae7 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5585 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
Diffstat (limited to 'src/mainboard/via')
-rw-r--r--src/mainboard/via/pc2500e/romstage.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/via/pc2500e/romstage.c b/src/mainboard/via/pc2500e/romstage.c
index e374cf93b7..b2703506a2 100644
--- a/src/mainboard/via/pc2500e/romstage.c
+++ b/src/mainboard/via/pc2500e/romstage.c
@@ -32,6 +32,7 @@
#include "drivers/pc80/udelay_io.c"
#include "lib/delay.c"
#include "southbridge/via/vt8237r/early_smbus.c"
+#include <superio/ite/common/ite.h>
#include <superio/ite/it8716f/it8716f.h>
#include <spd.h>
@@ -59,7 +60,7 @@ void main(unsigned long bist)
/* Enable multifunction for northbridge. */
pci_write_config8(ctrl.d0f0, 0x4f, 0x01);
- it8716f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();
enable_smbus();
smbus_fixup(&ctrl);