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author | Paul Menzel <paulepanter@users.sourceforge.net> | 2017-06-05 12:35:28 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2017-06-07 12:01:29 +0200 |
commit | 619e83045a3dfc189cf12b2f755b7a888c428382 (patch) | |
tree | fffe38801b54b369ec0d541bc6e957920afb7ab3 /src/mainboard/via | |
parent | e213bf37672d124af636d95f4f869174d0c1914b (diff) | |
download | coreboot-619e83045a3dfc189cf12b2f755b7a888c428382.tar.xz |
via/epia-m700: Wrap long line in comment
Wrapping the long line tries to address a warning by `checkpatch.pl`,
but the line is still over 80 characters long.
Change-Id: Ib75d4da1880624eb83f7a419cb6762f1c4c2a7b2
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/20033
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/via')
-rw-r--r-- | src/mainboard/via/epia-m700/romstage.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c index 57b59495c0..7b7140e105 100644 --- a/src/mainboard/via/epia-m700/romstage.c +++ b/src/mainboard/via/epia-m700/romstage.c @@ -526,7 +526,8 @@ void main(unsigned long bist) */ #if PAYLOAD_IS_SEABIOS == 1 if (boot_mode == 3) { - /* An idea of Libo.Feng at amd.com in http://www.coreboot.org/pipermail/coreboot/2008-December/043111.html + /* An idea of Libo.Feng at amd.com in + * http://www.coreboot.org/pipermail/coreboot/2008-December/043111.html * * I want move the 1M data, I have to set some MTRRs myself. * Setting MTRR before back memory save s3 resume time about |