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author | Nils Jacobs <njacobs8@adsltotaal.nl> | 2011-12-30 23:00:11 +0100 |
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committer | Patrick Georgi <patrick@georgi-clan.de> | 2012-01-07 11:46:50 +0100 |
commit | d0ac789e212c1bef6582e2ae33118280f287318e (patch) | |
tree | 7c66428df27d894a34067b1f8aca69354da56fd0 /src/mainboard/wyse/s50 | |
parent | f3fe3d2140e147b7cb55428a982f14dacd0f8ef7 (diff) | |
download | coreboot-d0ac789e212c1bef6582e2ae33118280f287318e.tar.xz |
Update geode GX2 tree to match LX.
Change-Id: I5b99c531e44ea09990b9da0b97213fb7945f34ee
Signed-off-by: Nils Jacobs <njacobs8@adsltotaal.nl>
Reviewed-on: http://review.coreboot.org/512
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/wyse/s50')
-rw-r--r-- | src/mainboard/wyse/s50/devicetree.cb | 36 |
1 files changed, 17 insertions, 19 deletions
diff --git a/src/mainboard/wyse/s50/devicetree.cb b/src/mainboard/wyse/s50/devicetree.cb index 504a5de696..e7cf0c2d60 100644 --- a/src/mainboard/wyse/s50/devicetree.cb +++ b/src/mainboard/wyse/s50/devicetree.cb @@ -20,18 +20,10 @@ ## chip northbridge/amd/gx2 - register "irqmap" = "0xaa5b" - - device lapic_cluster 0 on - chip cpu/amd/model_gx2 - device lapic 0 on end - end - end - device pci_domain 0 on - subsystemid 102d 0 inherit - device pci 1.0 on end - device pci 1.1 on end - chip southbridge/amd/cs5536 + device pci_domain 0 on + device pci 1.0 on end # Geode GX2 Host Bridge + device pci 1.1 on end # Geode GX2 Graphics Processor + chip southbridge/amd/cs5536 register "enable_gpio_int_route" = "0x0D0C0700" register "enable_ide_nand_flash" = "0" # 0:ide mode, 1:flash register "enable_USBP4_device" = "0" #0: host, 1:device @@ -42,13 +34,19 @@ chip northbridge/amd/gx2 register "com2_enable" = "0" register "com2_address" = "0x2F8" register "com2_irq" = "3" - device pci e.0 on end # Realtek 8139 LAN - device pci f.0 on end # ISA Bridge - device pci f.2 on end # IDE Controller - device pci f.3 on end # Audio - device pci f.4 on end # OHCI + device pci e.0 on end # Realtek 8139 LAN + device pci f.0 on end # ISA Bridge + device pci f.2 on end # IDE Controller + device pci f.3 on end # Audio + device pci f.4 on end # OHCI device pci f.5 on end # EHCI - end - end + end + end + # APIC cluster is late CPU init. + device lapic_cluster 0 on + chip cpu/amd/model_gx2 + device lapic 0 on end + end + end end |