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authorEric Lai <ericr_lai@compal.corp-partner.google.com>2019-04-16 14:30:49 +0800
committerDuncan Laurie <dlaurie@chromium.org>2019-04-24 15:52:40 +0000
commit1a1fe6e3841f861d00aec62a2c0a4d6ee3e0d6c3 (patch)
tree8c194c58800af21ca9b1f5df6e34e9a91123b3a6 /src/mainboard
parent389f9277518e93c24741581da58f5d3809377357 (diff)
downloadcoreboot-1a1fe6e3841f861d00aec62a2c0a4d6ee3e0d6c3.tar.xz
mb/google/sarien: Add power control for Sarien touchscreen
This change will save touchscreen power leakage 2-3mW in S0iX and increase T2 display time delay to meet display panel requirement. BUG=b:129899315 TEST= Measure touchscreen power from Sarien during S0iX Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I48419132ba734f20ad5cf484c2dda609570a6dd0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/32330 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/sarien/variants/sarien/devicetree.cb14
1 files changed, 9 insertions, 5 deletions
diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
index d5e8afbc34..27c0913c6f 100644
--- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb
+++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb
@@ -310,10 +310,12 @@ chip soc/intel/cannonlake
register "generic.desc" = ""ELAN Touchscreen""
register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_C23_IRQ)"
register "generic.probed" = "1"
+ register "generic.reset_gpio" =
+ "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E7)"
+ register "generic.reset_delay_ms" = "10"
register "generic.enable_gpio" =
- "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E7)"
- register "generic.enable_delay_ms" = "5"
- register "generic.enable_off_delay_ms" = "100"
+ "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B21)"
+ register "generic.enable_delay_ms" = "55"
register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x01"
register "generic.device_present_gpio" = "GPP_B4"
@@ -325,8 +327,10 @@ chip soc/intel/cannonlake
register "desc" = ""Melfas Touchscreen""
register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_C23_IRQ)"
register "probed" = "1"
- register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E7)"
- register "enable_delay_ms" = "5"
+ register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E7)"
+ register "reset_delay_ms" = "10"
+ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B21)"
+ register "enable_delay_ms" = "55"
register "has_power_resource" = "1"
register "device_present_gpio" = "GPP_B4"
register "device_present_gpio_invert" = "1"