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authorDavid Hendricks <dhendrix@chromium.org>2013-02-15 16:23:23 -0800
committerRonald G. Minnich <rminnich@gmail.com>2013-02-19 17:21:30 +0100
commit249cdc39431362241d154b6d091228e3c4c4e028 (patch)
treeba13adb8c0994949d174cec66f091202c64859dc /src/mainboard
parent11a7db3b570eb07759a7f4b5d8397be87518388d (diff)
downloadcoreboot-249cdc39431362241d154b6d091228e3c4c4e028.tar.xz
snow: add cpu_cluster and domain resources via devicetree.cb
This patch will cause the resource allocator to actually set aside the memory resources using methods in the previous patch. The coreboot table output will include "RAM" entries (there were none before): coreboot memory table: 0. 0000000040400000-00000000bff001ff: RAM 1. 00000000bff00200-00000000bff00fff: CONFIGURATION TABLES 2. 00000000bff01000-00000000bfffffff: RAM Change-Id: I5cd76e93fc232fdae1754253efb4e9269b3a20c0 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2420 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/snow/devicetree.cb6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/snow/devicetree.cb b/src/mainboard/google/snow/devicetree.cb
index f88835e12f..4c88ea8e98 100644
--- a/src/mainboard/google/snow/devicetree.cb
+++ b/src/mainboard/google/snow/devicetree.cb
@@ -19,8 +19,14 @@
# FIXME: this is just a stub for now
chip cpu/samsung/exynos5250
+
+device cpu_cluster 0 on
+end
+
+device domain 0 on
chip drivers/generic/generic # I2C0 controller
device i2c 6 on end # ?
device i2c 9 on end # ?
end
end
+end