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authorRaul E Rangel <rrangel@chromium.org>2021-03-24 16:54:32 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-03-29 18:57:38 +0000
commit2c62df229f49b7dde6a9ad5d963153582efb6822 (patch)
tree826f2728ba06cb6b332d9e5f01e204466af1d220 /src/mainboard
parent95b3dc3da9b10cb3445fdd789bfdfb0615f16ef4 (diff)
downloadcoreboot-2c62df229f49b7dde6a9ad5d963153582efb6822.tar.xz
mb/google/guybrush: Enable DISABLE_SPI_FLASH_ROM_SHARING
Guybrush uses GPIO67 as an input. BUG=none TEST=Boot guybrush Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I10068bb6870b2cb96033cf3893cde71db5c1d709 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51781 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/guybrush/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/guybrush/Kconfig b/src/mainboard/google/guybrush/Kconfig
index 5645c1750b..77d2537ee4 100644
--- a/src/mainboard/google/guybrush/Kconfig
+++ b/src/mainboard/google/guybrush/Kconfig
@@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS
def_bool y
select AMD_SOC_CONSOLE_UART
select BOARD_ROMSIZE_KB_16384
+ select DISABLE_SPI_FLASH_ROM_SHARING
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
select EC_GOOGLE_CHROMEEC