chromeos: update old boards to use lb_add_gpios notation

Instead of manually filling out the lb_gpios struct,
use the newer lb_add_gpios notation, which is more
compact and less error-prone.

BUG=b:124141368
TEST=util/lint/checkpatch.pl -g origin/master..HEAD
TEST=util/abuild/abuild -B -e -y -c 50 -p none -x
BRANCH=none

Change-Id: I90795f32be5de881c94519933f36127098c184df
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32031
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

11 files changed, 189 insertions, 418 deletions

diff --git a/src/mainboard/google/butterfly/chromeos.c b/src/mainboard/google/butterfly/chromeos.c
index 11b28cde90..a956e2869b 100644
--- a/src/mainboard/google/butterfly/chromeos.c
+++ b/src/mainboard/google/butterfly/chromeos.c
@@ -33,53 +33,28 @@
 #if ENV_RAMSTAGE
 #include <boot/coreboot_tables.h>
 
-#define GPIO_COUNT	6
-
 void fill_lb_gpios(struct lb_gpios *gpios)
 {
-	struct device *dev = pcidev_on_root(0x1f, 0);
-	u16 gpio_base = pci_read_config16(dev, GPIOBASE) & 0xfffe;
-
-	int lidswitch = 0;
-	if (!gpio_base)
-		return;
-
-	gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio));
-	gpios->count = GPIO_COUNT;
-
-	/* Write Protect: GPIO active Low */
-	gpios->gpios[0].port = WP_GPIO;
-	gpios->gpios[0].polarity = ACTIVE_LOW;
-	gpios->gpios[0].value = !get_write_protect_state();
-	strncpy((char *)gpios->gpios[0].name,"write protect",
-							GPIO_MAX_NAME_LENGTH);
-
-	/* Recovery: virtual GPIO active high */
-	gpios->gpios[1].port = -1;
-	gpios->gpios[1].polarity = ACTIVE_HIGH;
-	gpios->gpios[1].value = get_recovery_mode_switch();
-	strncpy((char *)gpios->gpios[1].name,"recovery", GPIO_MAX_NAME_LENGTH);
-
-	/* lid switch value from EC */
-	gpios->gpios[3].port = -1;
-	gpios->gpios[3].polarity = ACTIVE_HIGH;
-	gpios->gpios[3].value = get_lid_switch();
-	strncpy((char *)gpios->gpios[3].name,"lid", GPIO_MAX_NAME_LENGTH);
-	printk(BIOS_DEBUG,"LID SWITCH FROM EC: %x\n", lidswitch);
-
-	/* Power Button - Hardcode Low as power button may still be pressed
-	   when read here.*/
-	gpios->gpios[4].port = -1;
-	gpios->gpios[4].polarity = ACTIVE_HIGH;
-	gpios->gpios[4].value = 0;
-	strncpy((char *)gpios->gpios[4].name,"power", GPIO_MAX_NAME_LENGTH);
-
-	/* Was VGA Option ROM loaded? */
-	gpios->gpios[5].port = -1; /* Indicate that this is a pseudo GPIO */
-	gpios->gpios[5].polarity = ACTIVE_HIGH;
-	gpios->gpios[5].value = gfx_get_init_done();
-	strncpy((char *)gpios->gpios[5].name,"oprom", GPIO_MAX_NAME_LENGTH);
-
+	struct lb_gpio chromeos_gpios[] = {
+		/* Write Protect: GPIO active Low */
+		{WP_GPIO, ACTIVE_LOW, !get_write_protect_state(),
+		 "write protect"},
+
+		/* Recovery: virtual GPIO active high */
+		{-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"},
+
+		/* lid switch value from EC */
+		{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
+
+		/* Power Button - Hardcode Low as power button may still be
+		 * pressed when read here.*/
+		{-1, ACTIVE_HIGH, 0, "power"},
+
+		/* Was VGA Option ROM loaded? */
+		/* -1 indicates that this is a pseudo GPIO */
+		{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
+	};
+	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
 #endif
 
diff --git a/src/mainboard/google/daisy/chromeos.c b/src/mainboard/google/daisy/chromeos.c
index ae456b47aa..65139bb1ad 100644
--- a/src/mainboard/google/daisy/chromeos.c
+++ b/src/mainboard/google/daisy/chromeos.c
@@ -25,44 +25,21 @@
 
 void fill_lb_gpios(struct lb_gpios *gpios)
 {
-	int count = 0;
+	struct lb_gpio chromeos_gpios[] = {
+		/* Write Protect: active low (WP_GPIO) */
+		{EXYNOS5_GPD1, ACTIVE_LOW, gpio_get_value(GPIO_D16),
+		 "write protect"},
 
-	/* Write Protect: active low */
-	gpios->gpios[count].port = EXYNOS5_GPD1;
-	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value = gpio_get_value(GPIO_D16); // WP_GPIO
-	strncpy((char *)gpios->gpios[count].name, "write protect",
-		GPIO_MAX_NAME_LENGTH);
-	count++;
+		/* Recovery: active low */
+		{-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"},
 
-	/* Recovery: active low */
-	gpios->gpios[count].port = -1;
-	gpios->gpios[count].polarity = ACTIVE_HIGH;
-	gpios->gpios[count].value = get_recovery_mode_switch();
-	strncpy((char *)gpios->gpios[count].name, "recovery",
-		GPIO_MAX_NAME_LENGTH);
-	count++;
+		/* Lid: active high (LID_GPIO) */
+		{EXYNOS5_GPX3, ACTIVE_HIGH, gpio_get_value(GPIO_X35), "lid"},
 
-	/* Lid: active high */
-	gpios->gpios[count].port = EXYNOS5_GPX3;
-	gpios->gpios[count].polarity = ACTIVE_HIGH;
-	gpios->gpios[count].value = gpio_get_value(GPIO_X35); // LID_GPIO
-	strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH);
-	count++;
-
-	/* Power: virtual GPIO active low */
-	gpios->gpios[count].port = EXYNOS5_GPX1;
-	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value =
-		gpio_get_value(GPIO_X13); // POWER_GPIO
-	strncpy((char *)gpios->gpios[count].name, "power",
-		GPIO_MAX_NAME_LENGTH);
-	count++;
-
-	gpios->size = sizeof(*gpios) + (count * sizeof(struct lb_gpio));
-	gpios->count = count;
-
-	printk(BIOS_ERR, "Added %d GPIOS size %d\n", count, gpios->size);
+		/* Power: virtual GPIO active low (POWER_GPIO) */
+		{EXYNOS5_GPX1, ACTIVE_LOW, gpio_get_value(GPIO_X13), "power"},
+	};
+	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
 
 int get_recovery_mode_switch(void)
diff --git a/src/mainboard/google/foster/chromeos.c b/src/mainboard/google/foster/chromeos.c
index 4cf2a858c0..024fd4ce7e 100644
--- a/src/mainboard/google/foster/chromeos.c
+++ b/src/mainboard/google/foster/chromeos.c
@@ -24,46 +24,21 @@
 
 void fill_lb_gpios(struct lb_gpios *gpios)
 {
-	int count = 0;
-
 	/* TBD(twarren@nvidia.com): Any analogs for these on Foster-FFD? */
+	struct lb_gpio chromeos_gpios[] = {
+		/* Write Protect: active low */
+		{-1, ACTIVE_LOW, get_write_protect_state(), "write protect"},
 
-	/* Write Protect: active low */
-	gpios->gpios[count].port = -1;
-	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value = get_write_protect_state();
-	strncpy((char *)gpios->gpios[count].name, "write protect",
-		GPIO_MAX_NAME_LENGTH);
-	count++;
-
-	/* Recovery: active high */
-	gpios->gpios[count].port = -1;
-	gpios->gpios[count].polarity = ACTIVE_HIGH;
-	gpios->gpios[count].value = get_recovery_mode_switch();
-	strncpy((char *)gpios->gpios[count].name, "recovery",
-		GPIO_MAX_NAME_LENGTH);
-	count++;
-
-	/* TODO: Power: active low / high depending on board id */
-	gpios->gpios[count].port = GPIO(X5);
-	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value = -1;
-	strncpy((char *)gpios->gpios[count].name, "power",
-		GPIO_MAX_NAME_LENGTH);
-	count++;
-
-	/* TODO: Reset: active low (output) */
-	gpios->gpios[count].port = GPIO(I5);
-	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value = -1;
-	strncpy((char *)gpios->gpios[count].name, "reset",
-		GPIO_MAX_NAME_LENGTH);
-	count++;
+		/* Recovery: active high */
+		{-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"},
 
-	gpios->size = sizeof(*gpios) + (count * sizeof(struct lb_gpio));
-	gpios->count = count;
+		/* TODO: Power: active low / high depending on board id */
+		{GPIO(X5), ACTIVE_LOW, -1, "power"},
 
-	printk(BIOS_ERR, "Added %d GPIOS size %d\n", count, gpios->size);
+		/* TODO: Reset: active low (output) */
+		{GPIO(I5), ACTIVE_LOW, -1, "reset"},
+	};
+	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
 
 int get_recovery_mode_switch(void)
diff --git a/src/mainboard/google/link/chromeos.c b/src/mainboard/google/link/chromeos.c
index 335f1f7f79..5156404ab7 100644
--- a/src/mainboard/google/link/chromeos.c
+++ b/src/mainboard/google/link/chromeos.c
@@ -22,43 +22,28 @@
 #ifndef __PRE_RAM__
 #include <boot/coreboot_tables.h>
 
-#define GPIO_COUNT	6
-
 void fill_lb_gpios(struct lb_gpios *gpios)
 {
-	gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio));
-	gpios->count = GPIO_COUNT;
-
-	/* Write Protect: GPIO57 = PCH_SPI_WP_D */
-	gpios->gpios[0].port = 57;
-	gpios->gpios[0].polarity = ACTIVE_HIGH;
-	gpios->gpios[0].value = get_write_protect_state();
-	strncpy((char *)gpios->gpios[0].name,"write protect",
-							GPIO_MAX_NAME_LENGTH);
-	/* Recovery: the "switch" comes from the EC */
-	gpios->gpios[1].port = -1; /* Indicate that this is a pseudo GPIO */
-	gpios->gpios[1].polarity = ACTIVE_HIGH;
-	gpios->gpios[1].value = get_recovery_mode_switch();
-	strncpy((char *)gpios->gpios[1].name,"recovery", GPIO_MAX_NAME_LENGTH);
-
-	/* Lid: the "switch" comes from the EC */
-	gpios->gpios[2].port = -1;
-	gpios->gpios[2].polarity = ACTIVE_HIGH;
-	gpios->gpios[2].value = get_lid_switch();
-	strncpy((char *)gpios->gpios[2].name,"lid", GPIO_MAX_NAME_LENGTH);
-
-	/* Power Button: hard-coded as not pressed; we'll detect later presses
-	 * via SMI. */
-	gpios->gpios[3].port = -1;
-	gpios->gpios[3].polarity = ACTIVE_HIGH;
-	gpios->gpios[3].value = 0;
-	strncpy((char *)gpios->gpios[3].name,"power", GPIO_MAX_NAME_LENGTH);
-
-	/* Did we load the VGA Option ROM? */
-	gpios->gpios[5].port = -1; /* Indicate that this is a pseudo GPIO */
-	gpios->gpios[5].polarity = ACTIVE_HIGH;
-	gpios->gpios[5].value = gfx_get_init_done();
-	strncpy((char *)gpios->gpios[5].name,"oprom", GPIO_MAX_NAME_LENGTH);
+	struct lb_gpio chromeos_gpios[] = {
+		/* Write Protect: GPIO57 = PCH_SPI_WP_D */
+		{57, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
+
+		/* Recovery: the "switch" comes from the EC */
+		/* -1 indicates that this is a pseudo GPIO */
+		{-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"},
+
+		/* Lid: the "switch" comes from the EC */
+		{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
+
+		/* Power Button: hard-coded as not pressed; we'll detect later
+		 * presses via SMI. */
+		{-1, ACTIVE_HIGH, 0, "power"},
+
+		/* Did we load the VGA Option ROM? */
+		/* -1 indicates that this is a pseudo GPIO */
+		{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
+	};
+	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
 #endif
 
diff --git a/src/mainboard/google/parrot/chromeos.c b/src/mainboard/google/parrot/chromeos.c
index 1420bf584d..99fc76439b 100644
--- a/src/mainboard/google/parrot/chromeos.c
+++ b/src/mainboard/google/parrot/chromeos.c
@@ -30,50 +30,29 @@
 #if ENV_RAMSTAGE
 #include <boot/coreboot_tables.h>
 
-#define GPIO_COUNT	6
-
 void fill_lb_gpios(struct lb_gpios *gpios)
 {
 	struct device *dev = pcidev_on_root(0x1f, 0);
-	u16 gpio_base = pci_read_config32(dev, GPIOBASE) & 0xfffe;
 	u16 gen_pmcon_1 = pci_read_config32(dev, GEN_PMCON_1);
 
-	if (!gpio_base)
-		return;
-
-	gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio));
-	gpios->count = GPIO_COUNT;
-
-	/* Write Protect: GPIO70 active high */
-	gpios->gpios[0].port = 70;
-	gpios->gpios[0].polarity = ACTIVE_LOW;
-	gpios->gpios[0].value = !get_write_protect_state();
-	strncpy((char *)gpios->gpios[0].name,"write protect", GPIO_MAX_NAME_LENGTH);
-
-	/* Recovery: Virtual GPIO in the EC (Servo GPIO68 active low) */
-	gpios->gpios[1].port = -1;
-	gpios->gpios[1].polarity = ACTIVE_HIGH;
-	gpios->gpios[1].value = get_recovery_mode_switch();
-	strncpy((char *)gpios->gpios[1].name,"recovery", GPIO_MAX_NAME_LENGTH);
-
-	/* Lid switch GPIO active high (open). */
-	gpios->gpios[3].port = 15;
-	gpios->gpios[3].polarity = ACTIVE_HIGH;
-	gpios->gpios[3].value = get_lid_switch();
-	strncpy((char *)gpios->gpios[3].name,"lid", GPIO_MAX_NAME_LENGTH);
-
-	/* Power Button */
-	gpios->gpios[4].port = 101;
-	gpios->gpios[4].polarity = ACTIVE_LOW;
-	gpios->gpios[4].value = (gen_pmcon_1 >> 9) & 1;
-	strncpy((char *)gpios->gpios[4].name,"power", GPIO_MAX_NAME_LENGTH);
-
-	/* Did we load the VGA Option ROM? */
-	gpios->gpios[5].port = -1; /* Indicate that this is a pseudo GPIO */
-	gpios->gpios[5].polarity = ACTIVE_HIGH;
-	gpios->gpios[5].value = gfx_get_init_done();
-	strncpy((char *)gpios->gpios[5].name,"oprom", GPIO_MAX_NAME_LENGTH);
+	struct lb_gpio chromeos_gpios[] = {
+		/* Write Protect: GPIO70 active high */
+		{70, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
+
+		/* Recovery: Virtual GPIO in the EC (Servo GPIO68 active low) */
+		{-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"},
+
+		/* Lid switch GPIO active high (open). */
+		{15, ACTIVE_HIGH, get_lid_switch(), "lid"},
+
+		/* Power Button */
+		{101, ACTIVE_LOW, (gen_pmcon_1 >> 9) & 1, "power"},
 
+		/* Did we load the VGA Option ROM? */
+		/* -1 indicates that this is a pseudo GPIO */
+		{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
+	};
+	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
 #endif
 
diff --git a/src/mainboard/google/peach_pit/chromeos.c b/src/mainboard/google/peach_pit/chromeos.c
index e782986cf4..f507bd8d6b 100644
--- a/src/mainboard/google/peach_pit/chromeos.c
+++ b/src/mainboard/google/peach_pit/chromeos.c
@@ -25,44 +25,21 @@
 
 void fill_lb_gpios(struct lb_gpios *gpios)
 {
-	int count = 0;
+	struct lb_gpio chromeos_gpios[] = {
+		/* Write Protect: active low (WP_GPIO) */
+		{EXYNOS5_GPX3, ACTIVE_LOW, gpio_get_value(GPIO_X30),
+		 "write protect"},
 
-	/* Write Protect: active low */
-	gpios->gpios[count].port = EXYNOS5_GPX3;
-	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value = gpio_get_value(GPIO_X30); // WP_GPIO
-	strncpy((char *)gpios->gpios[count].name, "write protect",
-		GPIO_MAX_NAME_LENGTH);
-	count++;
+		/* Recovery: active low */
+		{-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"},
 
-	/* Recovery: active low */
-	gpios->gpios[count].port = -1;
-	gpios->gpios[count].polarity = ACTIVE_HIGH;
-	gpios->gpios[count].value = get_recovery_mode_switch();
-	strncpy((char *)gpios->gpios[count].name, "recovery",
-		GPIO_MAX_NAME_LENGTH);
-	count++;
+		/* Lid: active high (LID_GPIO) */
+		{EXYNOS5_GPX3, ACTIVE_HIGH, gpio_get_value(GPIO_X34), "lid"},
 
-	/* Lid: active high */
-	gpios->gpios[count].port = EXYNOS5_GPX3;
-	gpios->gpios[count].polarity = ACTIVE_HIGH;
-	gpios->gpios[count].value = gpio_get_value(GPIO_X34); // LID_GPIO
-	strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH);
-	count++;
-
-	/* Power: virtual GPIO active low */
-	gpios->gpios[count].port = EXYNOS5_GPX1;
-	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value =
-		gpio_get_value(GPIO_X12); // POWER_GPIO
-	strncpy((char *)gpios->gpios[count].name, "power",
-		GPIO_MAX_NAME_LENGTH);
-	count++;
-
-	gpios->size = sizeof(*gpios) + (count * sizeof(struct lb_gpio));
-	gpios->count = count;
-
-	printk(BIOS_ERR, "Added %d GPIOS size %d\n", count, gpios->size);
+		/* Power: virtual GPIO active low (POWER_GPIO) */
+		{EXYNOS5_GPX1, ACTIVE_LOW, gpio_get_value(GPIO_X12), "power"},
+	};
+	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
 
 int get_recovery_mode_switch(void)
diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c
index d366e40822..015e0aad32 100644
--- a/src/mainboard/google/stout/chromeos.c
+++ b/src/mainboard/google/stout/chromeos.c
@@ -29,49 +29,30 @@
 #if ENV_RAMSTAGE
 #include <boot/coreboot_tables.h>
 
-#define GPIO_COUNT	7
-
 void fill_lb_gpios(struct lb_gpios *gpios)
 {
-	gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio));
-	gpios->count = GPIO_COUNT;
-
-	/* Write Protect: GPIO7 */
-	gpios->gpios[0].port = 7;
-	gpios->gpios[0].polarity = ACTIVE_LOW;
-	gpios->gpios[0].value = !get_write_protect_state();
-	strncpy((char *)gpios->gpios[0].name,"write protect",
-							GPIO_MAX_NAME_LENGTH);
-
-	/* Recovery: Virtual switch */
-	gpios->gpios[1].port = -1;
-	gpios->gpios[1].polarity = ACTIVE_HIGH;
-	gpios->gpios[1].value = get_recovery_mode_switch();
-	strncpy((char *)gpios->gpios[1].name,"recovery", GPIO_MAX_NAME_LENGTH);
-
-	/* Lid Switch: Virtual switch */
-	gpios->gpios[3].port = -1;
-	gpios->gpios[3].polarity = ACTIVE_HIGH;
-	gpios->gpios[3].value = get_lid_switch();
-	strncpy((char *)gpios->gpios[3].name,"lid", GPIO_MAX_NAME_LENGTH);
-
-	/* Power Button: Virtual switch */
-	gpios->gpios[4].port = -1;
-	gpios->gpios[4].polarity = ACTIVE_HIGH;
-	gpios->gpios[4].value = 0; /* Hard-code to de-asserted */
-	strncpy((char *)gpios->gpios[4].name,"power", GPIO_MAX_NAME_LENGTH);
-
-	/* Was VGA Option ROM loaded? */
-	gpios->gpios[5].port = -1; /* Indicate that this is a pseudo GPIO */
-	gpios->gpios[5].polarity = ACTIVE_HIGH;
-	gpios->gpios[5].value = gfx_get_init_done();
-	strncpy((char *)gpios->gpios[5].name,"oprom", GPIO_MAX_NAME_LENGTH);
-
-	/* EC is in RW mode when it isn't in recovery mode. */
-	gpios->gpios[6].port = -1;
-	gpios->gpios[6].polarity = ACTIVE_HIGH;
-	gpios->gpios[6].value = !get_recovery_mode_switch();
-	strncpy((char *)gpios->gpios[6].name,"ec_in_rw", GPIO_MAX_NAME_LENGTH);
+	struct lb_gpio chromeos_gpios[] = {
+		/* Write Protect: GPIO7 */
+		{7, ACTIVE_LOW, !get_write_protect_state(), "write protect"},
+
+		/* Recovery: Virtual switch */
+		{-1, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"},
+
+		/* Lid Switch: Virtual switch */
+		{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
+
+		/* Power Button: Virtual switch */
+		/* Hard-code value to de-asserted */
+		{-1, ACTIVE_HIGH, 0, "power"},
+
+		/* Was VGA Option ROM loaded? */
+		/* -1 indicates that this is a pseudo GPIO */
+		{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
+
+		/* EC is in RW mode when it isn't in recovery mode. */
+		{-1, ACTIVE_HIGH, !get_recovery_mode_switch(), "ec_in_rw"}
+	};
+	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
 #endif
 
diff --git a/src/mainboard/intel/baskingridge/chromeos.c b/src/mainboard/intel/baskingridge/chromeos.c
index 1c62e5e0eb..875578fed4 100644
--- a/src/mainboard/intel/baskingridge/chromeos.c
+++ b/src/mainboard/intel/baskingridge/chromeos.c
@@ -26,52 +26,25 @@
 #if ENV_RAMSTAGE
 #include <boot/coreboot_tables.h>
 
-#define GPIO_COUNT	6
-
 void fill_lb_gpios(struct lb_gpios *gpios)
 {
-	struct device *dev = pcidev_on_root(0x1f, 0);
-	u16 gpio_base = pci_read_config32(dev, GPIOBASE) & 0xfffe;
-
-	if (!gpio_base)
-		return;
-
-	u32 gp_lvl  = inl(gpio_base + GP_LVL);
-	u32 gp_lvl3 = inl(gpio_base + GP_LVL3);
-
-	gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio));
-	gpios->count = GPIO_COUNT;
-
-	/* Write Protect: GPIO22 */
-	gpios->gpios[0].port = 0;
-	gpios->gpios[0].polarity = ACTIVE_LOW;
-	gpios->gpios[0].value = (gp_lvl >> 22) & 1;
-	strncpy((char *)gpios->gpios[0].name,"write protect",
-							GPIO_MAX_NAME_LENGTH);
+	struct lb_gpio chromeos_gpios[] = {
+		/* Write Protect: GPIO22 */
+		{0, ACTIVE_LOW, get_write_protect_state(), "write protect"},
 
-	/* Recovery: GPIO69 - SV_DETECT - J8E3 (silkscreen: J8E2) */
-	gpios->gpios[1].port = 69;
-	gpios->gpios[1].polarity = ACTIVE_HIGH;
-	gpios->gpios[1].value = (gp_lvl3 >> (69-64)) & 1;
-	strncpy((char *)gpios->gpios[1].name,"recovery", GPIO_MAX_NAME_LENGTH);
+		/* Recovery: GPIO69 - SV_DETECT - J8E3 (silkscreen: J8E2) */
+		{69, ACTIVE_HIGH, get_recovery_mode_switch(), "recovery"},
 
-	/* Hard code the lid switch GPIO to open. */
-	gpios->gpios[3].port = -1;
-	gpios->gpios[3].polarity = ACTIVE_HIGH;
-	gpios->gpios[3].value = 1;
-	strncpy((char *)gpios->gpios[3].name,"lid", GPIO_MAX_NAME_LENGTH);
+		/* Hard code the lid switch GPIO to open. */
+		{-1, ACTIVE_HIGH, 1, "lid"},
 
-	/* Power Button */
-	gpios->gpios[4].port = -1;
-	gpios->gpios[4].polarity = ACTIVE_HIGH;
-	gpios->gpios[4].value = 0;
-	strncpy((char *)gpios->gpios[4].name,"power", GPIO_MAX_NAME_LENGTH);
+		/* Power Button */
+		{-1, ACTIVE_HIGH, 0, "power"},
 
-	/* Did we load the VGA option ROM? */
-	gpios->gpios[5].port = -1;
-	gpios->gpios[5].polarity = ACTIVE_HIGH;
-	gpios->gpios[5].value = gfx_get_init_done();
-	strncpy((char *)gpios->gpios[5].name,"oprom", GPIO_MAX_NAME_LENGTH);
+		/* Did we load the VGA option ROM? */
+		{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
+	};
+	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
 #endif
 
@@ -86,7 +59,8 @@ int get_recovery_mode_switch(void)
 
 int get_write_protect_state(void)
 {
-	return 0;
+	/* Write protect is active low, so invert it here */
+	return !get_gpio(22);
 }
 
 static const struct cros_gpio cros_gpios[] = {
diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c
index 8c0aeea4d1..9fae82211f 100644
--- a/src/mainboard/intel/emeraldlake2/chromeos.c
+++ b/src/mainboard/intel/emeraldlake2/chromeos.c
@@ -26,53 +26,25 @@
 #if ENV_RAMSTAGE
 #include <boot/coreboot_tables.h>
 
-#define GPIO_COUNT	6
-
 void fill_lb_gpios(struct lb_gpios *gpios)
 {
-	struct device *dev = pcidev_on_root(0x1f, 0);
-	u16 gpio_base = pci_read_config32(dev, GPIOBASE) & 0xfffe;
-
-	if (!gpio_base)
-		return;
-
-	u32 gp_lvl = inl(gpio_base + 0x0c);
-	u32 gp_lvl2 = inl(gpio_base + 0x38);
-	/* u32 gp_lvl3 = inl(gpio_base + 0x48); */
-
-	gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio));
-	gpios->count = GPIO_COUNT;
+	struct lb_gpio chromeos_gpios[] = {
+		/* Write Protect: GPIO48 */
+		{48, ACTIVE_LOW, get_write_protect_state(), "write protect"},
 
-	/* Write Protect: GPIO48 */
-	gpios->gpios[0].port = 48;
-	gpios->gpios[0].polarity = ACTIVE_LOW;
-	gpios->gpios[0].value = (gp_lvl2 >> (48-32)) & 1;
-	strncpy((char *)gpios->gpios[0].name,"write protect",
-							GPIO_MAX_NAME_LENGTH);
+		/* Recovery: GPIO22 */
+		{22, ACTIVE_LOW, get_recovery_mode_switch(), "recovery"},
 
-	/* Recovery: GPIO22 */
-	gpios->gpios[1].port = 22;
-	gpios->gpios[1].polarity = ACTIVE_LOW;
-	gpios->gpios[1].value = (gp_lvl >> 22) & 1;
-	strncpy((char *)gpios->gpios[1].name,"recovery", GPIO_MAX_NAME_LENGTH);
+		/* Hard code the lid switch GPIO to open. */
+		{-1, ACTIVE_HIGH, 1, "lid"},
 
-	/* Hard code the lid switch GPIO to open. */
-	gpios->gpios[3].port = -1;
-	gpios->gpios[3].polarity = ACTIVE_HIGH;
-	gpios->gpios[3].value = 1;
-	strncpy((char *)gpios->gpios[3].name,"lid", GPIO_MAX_NAME_LENGTH);
+		/* Power Button */
+		{-1, ACTIVE_HIGH, 0, "power"},
 
-	/* Power Button */
-	gpios->gpios[4].port = -1;
-	gpios->gpios[4].polarity = ACTIVE_HIGH;
-	gpios->gpios[4].value = 0;
-	strncpy((char *)gpios->gpios[4].name,"power", GPIO_MAX_NAME_LENGTH);
-
-	/* Did we load the VGA option ROM? */
-	gpios->gpios[5].port = -1;
-	gpios->gpios[5].polarity = ACTIVE_HIGH;
-	gpios->gpios[5].value = gfx_get_init_done();
-	strncpy((char *)gpios->gpios[5].name,"oprom", GPIO_MAX_NAME_LENGTH);
+		/* Did we load the VGA option ROM? */
+		{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
+	};
+	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
 #endif
 
@@ -82,6 +54,12 @@ int get_recovery_mode_switch(void)
 	return !get_gpio(22);
 }
 
+int get_write_protect_state(void)
+{
+	/* Write protect is active low, so invert it here */
+	return !get_gpio(48);
+}
+
 static const struct cros_gpio cros_gpios[] = {
 	CROS_GPIO_REC_AL(22, CROS_GPIO_DEVICE_NAME),
 	CROS_GPIO_DEV_AH(57, CROS_GPIO_DEVICE_NAME),
diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c
index 5d688fe9f9..2d4fb61be8 100644
--- a/src/mainboard/samsung/lumpy/chromeos.c
+++ b/src/mainboard/samsung/lumpy/chromeos.c
@@ -34,46 +34,31 @@
 #include "ec.h"
 #include <ec/smsc/mec1308/ec.h>
 
-#define GPIO_COUNT	5
-
 void fill_lb_gpios(struct lb_gpios *gpios)
 {
 	struct device *dev = pcidev_on_root(0x1f, 0);
 	u16 gen_pmcon_1 = pci_read_config32(dev, GEN_PMCON_1);
-	u8  lid = ec_read(0x83);
-
-	gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio));
-	gpios->count = GPIO_COUNT;
-
-	/* Write Protect: GPIO24 = KBC3_SPI_WP# */
-	gpios->gpios[0].port = GPIO_SPI_WP;
-	gpios->gpios[0].polarity = ACTIVE_HIGH;
-	gpios->gpios[0].value = get_write_protect_state();
-	strncpy((char *)gpios->gpios[0].name,"write protect",
-							GPIO_MAX_NAME_LENGTH);
-
-	/* Recovery: GPIO42 = CHP3_REC_MODE# */
-	gpios->gpios[1].port = GPIO_REC_MODE;
-	gpios->gpios[1].polarity = ACTIVE_LOW;
-	gpios->gpios[1].value = !get_recovery_mode_switch();
-	strncpy((char *)gpios->gpios[1].name,"recovery", GPIO_MAX_NAME_LENGTH);
-
-	gpios->gpios[2].port = 100;
-	gpios->gpios[2].polarity = ACTIVE_HIGH;
-	gpios->gpios[2].value = lid & 1;
-	strncpy((char *)gpios->gpios[2].name,"lid", GPIO_MAX_NAME_LENGTH);
-
-	/* Power Button */
-	gpios->gpios[3].port = 101;
-	gpios->gpios[3].polarity = ACTIVE_LOW;
-	gpios->gpios[3].value = (gen_pmcon_1 >> 9) & 1;
-	strncpy((char *)gpios->gpios[3].name,"power", GPIO_MAX_NAME_LENGTH);
-
-	/* Did we load the VGA Option ROM? */
-	gpios->gpios[4].port = -1; /* Indicate that this is a pseudo GPIO */
-	gpios->gpios[4].polarity = ACTIVE_HIGH;
-	gpios->gpios[4].value = gfx_get_init_done();
-	strncpy((char *)gpios->gpios[4].name,"oprom", GPIO_MAX_NAME_LENGTH);
+	u8 lid = ec_read(0x83);
+
+	struct lb_gpio chromeos_gpios[] = {
+		/* Write Protect: GPIO24 = KBC3_SPI_WP# */
+		{GPIO_SPI_WP, ACTIVE_HIGH, get_write_protect_state(),
+		 "write protect"},
+
+		/* Recovery: GPIO42 = CHP3_REC_MODE# */
+		{GPIO_REC_MODE, ACTIVE_LOW, !get_recovery_mode_switch(),
+		 "recovery"},
+
+		{100, ACTIVE_HIGH, lid & 1, "lid"},
+
+		/* Power Button */
+		{101, ACTIVE_LOW, (gen_pmcon_1 >> 9) & 1, "power"},
+
+		/* Did we load the VGA Option ROM? */
+		/* -1 indicates that this is a pseudo GPIO */
+		{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
+	};
+	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
 #endif
 
diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c
index 295c31f49d..b1ad137113 100644
--- a/src/mainboard/samsung/stumpy/chromeos.c
+++ b/src/mainboard/samsung/stumpy/chromeos.c
@@ -31,46 +31,31 @@
 #if ENV_RAMSTAGE
 #include <boot/coreboot_tables.h>
 
-#define GPIO_COUNT	5
-
 void fill_lb_gpios(struct lb_gpios *gpios)
 {
 	struct device *dev = pcidev_on_root(0x1f, 0);
 	u16 gen_pmcon_1 = pci_read_config32(dev, GEN_PMCON_1);
 
-	gpios->size = sizeof(*gpios) + (GPIO_COUNT * sizeof(struct lb_gpio));
-	gpios->count = GPIO_COUNT;
-
-	/* Write Protect: GPIO68 = CHP3_SPI_WP */
-	gpios->gpios[0].port = GPIO_SPI_WP;
-	gpios->gpios[0].polarity = ACTIVE_HIGH;
-	gpios->gpios[0].value = get_write_protect_state();
-	strncpy((char *)gpios->gpios[0].name,"write protect",
-							GPIO_MAX_NAME_LENGTH);
-
-	/* Recovery: GPIO42 = CHP3_REC_MODE# */
-	gpios->gpios[1].port = GPIO_REC_MODE;
-	gpios->gpios[1].polarity = ACTIVE_LOW;
-	gpios->gpios[1].value = !get_recovery_mode_switch();
-	strncpy((char *)gpios->gpios[1].name,"recovery", GPIO_MAX_NAME_LENGTH);
-
-	/* Hard code the lid switch GPIO to open. */
-	gpios->gpios[2].port = 100;
-	gpios->gpios[2].polarity = ACTIVE_HIGH;
-	gpios->gpios[2].value = 1;
-	strncpy((char *)gpios->gpios[2].name,"lid", GPIO_MAX_NAME_LENGTH);
-
-	/* Power Button */
-	gpios->gpios[3].port = 101;
-	gpios->gpios[3].polarity = ACTIVE_LOW;
-	gpios->gpios[3].value = (gen_pmcon_1 >> 9) & 1;
-	strncpy((char *)gpios->gpios[3].name,"power", GPIO_MAX_NAME_LENGTH);
-
-	/* Did we load the VGA Option ROM? */
-	gpios->gpios[4].port = -1; /* Indicate that this is a pseudo GPIO */
-	gpios->gpios[4].polarity = ACTIVE_HIGH;
-	gpios->gpios[4].value = gfx_get_init_done();
-	strncpy((char *)gpios->gpios[4].name,"oprom", GPIO_MAX_NAME_LENGTH);
+	struct lb_gpio chromeos_gpios[] = {
+		/* Write Protect: GPIO68 = CHP3_SPI_WP */
+		{GPIO_SPI_WP, ACTIVE_HIGH, get_write_protect_state(),
+		 "write protect"},
+
+		/* Recovery: GPIO42 = CHP3_REC_MODE# */
+		{GPIO_REC_MODE, ACTIVE_LOW, !get_recovery_mode_switch(),
+		 "recovery"},
+
+		/* Hard code the lid switch GPIO to open. */
+		{100, ACTIVE_HIGH, 1, "lid"},
+
+		/* Power Button */
+		{101, ACTIVE_LOW, (gen_pmcon_1 >> 9) & 1, "power"},
+
+		/* Did we load the VGA Option ROM? */
+		/* -1 indicates that this is a pseudo GPIO */
+		{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
+	};
+	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
 #endif