diff options
author | Justin TerAvest <teravest@chromium.org> | 2018-07-17 10:20:58 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-07-18 18:52:29 +0000 |
commit | 3a1a956286d466e0438dc76377db5bdf9fb374ff (patch) | |
tree | 1ae611cfea0da82b898bf75280cbf99898b04c78 /src/mainboard | |
parent | faca0bc2fa5a347a98fc3ee8dd1a5dd9c9763459 (diff) | |
download | coreboot-3a1a956286d466e0438dc76377db5bdf9fb374ff.tar.xz |
mb/google/octopus: Create meep variant
This creates a meep variant for octopus.
The devicetree overrides are copied from yorp, otherwise everything
just defaults to baseboard settings.
BUG=b:111543000
TEST=None
Change-Id: I791f8d1589d7323fbe884dddf0f9d7362a41b9ac
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Reviewed-on: https://review.coreboot.org/27516
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
6 files changed, 127 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/Kconfig b/src/mainboard/google/octopus/Kconfig index 34ca725a3f..dc58ec8310 100644 --- a/src/mainboard/google/octopus/Kconfig +++ b/src/mainboard/google/octopus/Kconfig @@ -43,6 +43,7 @@ config VARIANT_DIR default "phaser" if BOARD_GOOGLE_PHASER default "fleex" if BOARD_GOOGLE_FLEEX default "bobba" if BOARD_GOOGLE_BOBBA + default "meep" if BOARD_GOOGLE_MEEP default "octopus" if BOARD_GOOGLE_OCTOPUS config DEVICETREE @@ -60,6 +61,7 @@ config MAINBOARD_PART_NUMBER default "Phaser" if BOARD_GOOGLE_PHASER default "Fleex" if BOARD_GOOGLE_FLEEX default "Bobba" if BOARD_GOOGLE_BOBBA + default "Meep" if BOARD_GOOGLE_MEEP default "Octopus" if BOARD_GOOGLE_OCTOPUS config MAINBOARD_FAMILY @@ -74,6 +76,7 @@ config GBB_HWID default "PHASER TEST 7167" if BOARD_GOOGLE_PHASER default "FLEEX TEST 7423" if BOARD_GOOGLE_FLEEX default "BOBBA TEST 4516" if BOARD_GOOGLE_BOBBA + default "MEEP TEST 1118" if BOARD_GOOGLE_MEEP default "OCTOPUS TEST 6859" if BOARD_GOOGLE_OCTOPUS config MAX_CPUS diff --git a/src/mainboard/google/octopus/Kconfig.name b/src/mainboard/google/octopus/Kconfig.name index 02fabff9d9..05a5d0fd67 100644 --- a/src/mainboard/google/octopus/Kconfig.name +++ b/src/mainboard/google/octopus/Kconfig.name @@ -36,3 +36,10 @@ config BOARD_GOOGLE_BOBBA select BOARD_GOOGLE_BASEBOARD_OCTOPUS select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC if CHROMEOS select NHLT_DA7219 if INCLUDE_NHLT_BLOBS + +config BOARD_GOOGLE_MEEP + bool "-> Meep" + select BASEBOARD_OCTOPUS_LAPTOP + select BOARD_GOOGLE_BASEBOARD_OCTOPUS + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC if CHROMEOS + select NHLT_DA7219 if INCLUDE_NHLT_BLOBS diff --git a/src/mainboard/google/octopus/variants/meep/include/variant/acpi/dptf.asl b/src/mainboard/google/octopus/variants/meep/include/variant/acpi/dptf.asl new file mode 100644 index 0000000000..cc17d560cf --- /dev/null +++ b/src/mainboard/google/octopus/variants/meep/include/variant/acpi/dptf.asl @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <baseboard/acpi/dptf.asl> diff --git a/src/mainboard/google/octopus/variants/meep/include/variant/ec.h b/src/mainboard/google/octopus/variants/meep/include/variant/ec.h new file mode 100644 index 0000000000..16f931b6cd --- /dev/null +++ b/src/mainboard/google/octopus/variants/meep/include/variant/ec.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef MAINBOARD_EC_H +#define MAINBOARD_EC_H + +#include <baseboard/ec.h> + +#endif diff --git a/src/mainboard/google/octopus/variants/meep/include/variant/gpio.h b/src/mainboard/google/octopus/variants/meep/include/variant/gpio.h new file mode 100644 index 0000000000..1fd1e11716 --- /dev/null +++ b/src/mainboard/google/octopus/variants/meep/include/variant/gpio.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + */ + +#ifndef MAINBOARD_GPIO_H +#define MAINBOARD_GPIO_H + +#include <baseboard/gpio.h> + +#endif /* MAINBOARD_GPIO_H */ diff --git a/src/mainboard/google/octopus/variants/meep/overridetree.cb b/src/mainboard/google/octopus/variants/meep/overridetree.cb new file mode 100644 index 0000000000..d29e6c1e4c --- /dev/null +++ b/src/mainboard/google/octopus/variants/meep/overridetree.cb @@ -0,0 +1,59 @@ +chip soc/intel/apollolake + + device domain 0 on + device pci 16.0 on + chip drivers/i2c/hid + register "generic.hid" = ""WCOM50C1"" + register "generic.desc" = ""WCOM Digitizer"" + register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_139_IRQ)" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" + register "generic.has_power_resource" = "1" + register "hid_desc_reg_offset" = "0x1" + device i2c 0x9 on end + end + end # - I2C 0 + device pci 17.1 on + chip drivers/i2c/da7219 + register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_137_IRQ)" + register "btn_cfg" = "50" + register "mic_det_thr" = "500" + register "jack_ins_deb" = "20" + register "jack_det_rate" = ""32ms_64ms"" + register "jack_rem_deb" = "1" + register "a_d_btn_thr" = "0xa" + register "d_b_btn_thr" = "0x16" + register "b_c_btn_thr" = "0x21" + register "c_mic_btn_thr" = "0x3e" + register "btn_avg" = "4" + register "adc_1bit_rpt" = "1" + register "micbias_lvl" = "2600" + register "mic_amp_in_sel" = ""diff"" + device i2c 1a on end + end + end # - I2C 5 + device pci 17.2 on + chip drivers/i2c/generic + register "hid" = ""ELAN0000"" + register "desc" = ""ELAN Touchpad"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_135_IRQ)" + register "wake" = "GPE0_DW2_02" + register "probed" = "1" + device i2c 15 on end + end + end # - I2C 6 + device pci 17.3 on + chip drivers/i2c/generic + register "hid" = ""ELAN0001"" + register "desc" = ""ELAN Touchscreen"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_212_IRQ)" + register "probed" = "1" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)" + register "reset_delay_ms" = "20" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_213)" + register "enable_delay_ms" = "1" + register "has_power_resource" = "1" + device i2c 10 on end + end + end # - I2C 7 + end +end |