diff options
author | Duncan Laurie <dlaurie@chromium.org> | 2013-12-10 07:48:00 -0800 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-09 05:43:01 +0200 |
commit | 4acd3c05d61562745321a9fe4d25a6ca98c66f05 (patch) | |
tree | e904e2424c7509571f5388f1705ac7ed3eefee91 /src/mainboard | |
parent | ad8d913f42b4dff80502456a08aac06e7fbcd0dd (diff) | |
download | coreboot-4acd3c05d61562745321a9fe4d25a6ca98c66f05.tar.xz |
rambi: Enable DPTF
This enables the DPTF framework, but it doesn't do much
without some sort of kernel+user components to drive it.
BUG=chrome-os-partner:17279
BRANCH=none
TEST=build and boot on rambi, dump DSDT and look over \_SB.DPTF
Change-Id: Icb632a6e70c3912bbdfa6ef3f5c87cd79d2b8a3a
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179480
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5003
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/google/rambi/acpi/dptf.asl | 28 | ||||
-rw-r--r-- | src/mainboard/google/rambi/acpi_tables.c | 8 | ||||
-rw-r--r-- | src/mainboard/google/rambi/dsdt.asl | 3 | ||||
-rw-r--r-- | src/mainboard/google/rambi/thermal.h | 35 |
4 files changed, 44 insertions, 30 deletions
diff --git a/src/mainboard/google/rambi/acpi/dptf.asl b/src/mainboard/google/rambi/acpi/dptf.asl new file mode 100644 index 0000000000..0d5cd654b2 --- /dev/null +++ b/src/mainboard/google/rambi/acpi/dptf.asl @@ -0,0 +1,28 @@ +#define DPTF_TSR0_SENSOR_ID 1 +#define DPTF_TSR0_SENSOR_NAME "TMP432_Internal" + +#define DPTF_TSR1_SENSOR_ID 2 +#define DPTF_TSR1_SENSOR_NAME "TMP432_Power_top" + +#define DPTF_TSR2_SENSOR_ID 3 +#define DPTF_TSR2_SENSOR_NAME "TMP432_CPU_bottom" + +Name (DTRT, Package () { + /* CPU Throttle Effect on CPU */ + Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TCPU, 100, 50, 0, 0, 0, 0}, + + /* CPU and Charger Effect on Temp Sensor 0 */ + Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TSR0, 100, 50, 0, 0, 0, 0 }, + Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR0, 80, 300, 0, 0, 0, 0 }, + + /* CPU and Charger Effect on Temp Sensor 1 */ + Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TSR1, 100, 50, 0, 0, 0, 0 }, + Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 80, 300, 0, 0, 0, 0 }, + + /* CPU and Charger Effect on Temp Sensor 2 */ + Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TSR2, 100, 50, 0, 0, 0, 0 }, + Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR2, 80, 300, 0, 0, 0, 0 }, +}) + +/* Include Baytrail DPTF */ +#include <soc/intel/baytrail/acpi/dptf/dptf.asl> diff --git a/src/mainboard/google/rambi/acpi_tables.c b/src/mainboard/google/rambi/acpi_tables.c index a4754f1df6..1d96decdcc 100644 --- a/src/mainboard/google/rambi/acpi_tables.c +++ b/src/mainboard/google/rambi/acpi_tables.c @@ -36,6 +36,8 @@ #include <baytrail/nvs.h> #include <baytrail/iomap.h> +#include "thermal.h" + extern const unsigned char AmlCode[]; static void acpi_create_gnvs(global_nvs_t *gnvs) @@ -59,6 +61,12 @@ static void acpi_create_gnvs(global_nvs_t *gnvs) /* TPM Present */ gnvs->tpmp = 1; + /* Enable DPTF */ + gnvs->tcrt = CRITICAL_TEMPERATURE; + gnvs->tpsv = PASSIVE_TEMPERATURE; + gnvs->tact = ACTIVE_TEMPERATURE; + gnvs->dpte = 1; + #if CONFIG_CHROMEOS chromeos_init_vboot(&(gnvs->chromeos)); gnvs->chromeos.vbt2 = google_ec_running_ro() ? diff --git a/src/mainboard/google/rambi/dsdt.asl b/src/mainboard/google/rambi/dsdt.asl index 1fbb8eb537..53f2922278 100644 --- a/src/mainboard/google/rambi/dsdt.asl +++ b/src/mainboard/google/rambi/dsdt.asl @@ -46,6 +46,9 @@ DefinitionBlock( //#include <soc/intel/baytrail/acpi/northcluster.asl> #include <soc/intel/baytrail/acpi/southcluster.asl> } + + /* Dynamic Platform Thermal Framework */ + #include "acpi/dptf.asl" } #include "acpi/chromeos.asl" diff --git a/src/mainboard/google/rambi/thermal.h b/src/mainboard/google/rambi/thermal.h index f771014215..2432b8d201 100644 --- a/src/mainboard/google/rambi/thermal.h +++ b/src/mainboard/google/rambi/thermal.h @@ -20,38 +20,13 @@ #ifndef BAYLEYBAY_THERMAL_H #define BAYLEYBAY_THERMAL_H -/* Fan is OFF */ -#define FAN4_THRESHOLD_OFF 0 -#define FAN4_THRESHOLD_ON 0 -#define FAN4_PWM 0x00 - -/* Fan is at LOW speed */ -#define FAN3_THRESHOLD_OFF 48 -#define FAN3_THRESHOLD_ON 55 -#define FAN3_PWM 0x40 - -/* Fan is at MEDIUM speed */ -#define FAN2_THRESHOLD_OFF 52 -#define FAN2_THRESHOLD_ON 64 -#define FAN2_PWM 0x80 - -/* Fan is at HIGH speed */ -#define FAN1_THRESHOLD_OFF 60 -#define FAN1_THRESHOLD_ON 68 -#define FAN1_PWM 0xb0 - -/* Fan is at FULL speed */ -#define FAN0_THRESHOLD_OFF 66 -#define FAN0_THRESHOLD_ON 78 -#define FAN0_PWM 0xff - /* Temperature which OS will shutdown at */ -#define CRITICAL_TEMPERATURE 100 +#define CRITICAL_TEMPERATURE 95 -/* Temperature which OS will throttle CPU */ -#define PASSIVE_TEMPERATURE 90 +/* Passive cooling policy threshold */ +#define PASSIVE_TEMPERATURE 0 -/* Tj_max value for calculating PECI CPU temperature */ -#define MAX_TEMPERATURE 100 +/* Temperature which OS will throttle CPU (when using a Fan) */ +#define ACTIVE_TEMPERATURE 80 #endif |