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authorPan Sheng-Liang <sheng-liang.pan@quanta.corp-partner.google.com>2018-10-04 16:17:22 +0800
committerAaron Durbin <adurbin@chromium.org>2018-10-05 16:36:35 +0000
commit4f6eccdcac841f48a6a4bac846840e2cb79a4ff3 (patch)
tree7cd066c061d733aaee85231760c8fbd8543301d4 /src/mainboard
parentf97ff0cd503eb254432848e0f6ec6b6c2a15ce47 (diff)
downloadcoreboot-4f6eccdcac841f48a6a4bac846840e2cb79a4ff3.tar.xz
mb/google/octopus: adjust Bobba I2C CLK under 400KHz
Need to tune I2C bus 0/6/7 clock frequency under the 400KHz for digitizer, touchpad, and touchscreen. Bug=b:117126484 TEST=flash coreboot to the DUT and measure I2C bus 0/6/7 clock frequency whether can <400KHz Change-Id: Icb9592c688b864a21efd4963a4463845dfaa06fb Signed-off-by: Pan Sheng-Liang <sheng-liang.pan@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/28907 Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/octopus/variants/bobba/overridetree.cb41
1 files changed, 41 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/variants/bobba/overridetree.cb b/src/mainboard/google/octopus/variants/bobba/overridetree.cb
index acb1d50d76..662a3025ba 100644
--- a/src/mainboard/google/octopus/variants/bobba/overridetree.cb
+++ b/src/mainboard/google/octopus/variants/bobba/overridetree.cb
@@ -1,5 +1,46 @@
chip soc/intel/apollolake
+ # Intel Common SoC Config
+ #+-------------------+---------------------------+
+ #| Field | Value |
+ #+-------------------+---------------------------+
+ #| GSPI0 | cr50 TPM. Early init is |
+ #| | required to set up a BAR |
+ #| | for TPM communication |
+ #| | before memory is up |
+ #| I2C0 | Digitizer |
+ #| I2C5 | Audio |
+ #| I2C6 | Trackpad |
+ #| I2C7 | Touchscreen |
+ #+-------------------+---------------------------+
+ register "common_soc_config" = "{
+ .gspi[0] = {
+ .speed_mhz = 1,
+ .early_init = 1,
+ },
+ .i2c[0] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 88,
+ .fall_time_ns = 16,
+ },
+ .i2c[5] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
+ },
+ .i2c[6] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 66,
+ .fall_time_ns = 90,
+ .data_hold_time_ns = 350,
+ },
+ .i2c[7] = {
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 44,
+ .fall_time_ns = 90,
+ },
+ }"
+
device domain 0 on
device pci 16.0 on
chip drivers/i2c/hid