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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-06-27 11:27:56 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-06-29 07:32:43 +0200
commit65e8f647bc55ee28bd389789788e666279537510 (patch)
treee93254e6c05cebec7beaf698437bb576aae656b6 /src/mainboard
parent7b3512dde3efa3d25d715bb61326ebfc995e9a69 (diff)
downloadcoreboot-65e8f647bc55ee28bd389789788e666279537510.tar.xz
intel romstage: Use run_ramstage()
Change-Id: I22a33e6027a4e807f7157a0dfafbd6377bc1285d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/15461 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/intel/cougar_canyon2/romstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/intel/cougar_canyon2/romstage.c b/src/mainboard/intel/cougar_canyon2/romstage.c
index 094ba328ef..998528dc4f 100644
--- a/src/mainboard/intel/cougar_canyon2/romstage.c
+++ b/src/mainboard/intel/cougar_canyon2/romstage.c
@@ -28,6 +28,7 @@
#include <cbmem.h>
#include <console/console.h>
#include <halt.h>
+#include <program_loading.h>
#include <reset.h>
#include <superio/smsc/sio1007/chip.h>
#include <fsp_util.h>
@@ -39,7 +40,6 @@
#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include "gpio.h"
-#include <arch/stages.h>
#define SIO_PORT 0x164e
@@ -303,7 +303,7 @@ void romstage_main_continue(EFI_STATUS status, VOID *HobListPtr) {
post_code(0x4f);
/* Load the ramstage. */
- copy_and_run();
+ run_ramstage();
while (1);
}