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authorEric Lai <ericr_lai@compal.corp-partner.google.com>2021-04-08 11:56:15 +0800
committerMartin Roth <martinroth@google.com>2021-04-12 17:26:52 +0000
commit67d099a7f242bcbadfdfaefc0d4680bec4caabb6 (patch)
tree3800f70542dda2fbb70fc8359d4611e65ea81b81 /src/mainboard
parent082be1073e5dbb5a2ec8c5f4cae82b2d54ff9780 (diff)
downloadcoreboot-67d099a7f242bcbadfdfaefc0d4680bec4caabb6.tar.xz
mb/google/mancomb: Temporary fix to set eSPI mux
BUG=b:182211161 TEST=builds Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: Ief59bdea392ab3f141ccf7444c608aef99701d2e Reviewed-on: https://review.coreboot.org/c/coreboot/+/52176 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/mancomb/bootblock.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/src/mainboard/google/mancomb/bootblock.c b/src/mainboard/google/mancomb/bootblock.c
index 11391efd1e..dd38c34f37 100644
--- a/src/mainboard/google/mancomb/bootblock.c
+++ b/src/mainboard/google/mancomb/bootblock.c
@@ -1,15 +1,37 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <amdblocks/acpimmio.h>
#include <bootblock_common.h>
#include <baseboard/variants.h>
+#include <console/console.h>
+#include <device/pci_ops.h>
+#include <soc/pci_devs.h>
void bootblock_mainboard_early_init(void)
{
size_t num_gpios;
+ uint32_t dword;
const struct soc_amd_gpio *gpios;
if (!CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) {
gpios = variant_early_gpio_table(&num_gpios);
program_gpios(gpios, num_gpios);
}
+
+ printk(BIOS_DEBUG, "Bootblock configure eSPI\n");
+
+ dword = pci_read_config32(SOC_LPC_DEV, 0x78);
+ dword &= 0xFFFFF9F3;
+ dword |= 0x200;
+ pci_write_config32(SOC_LPC_DEV, 0x78, dword);
+ pci_write_config32(SOC_LPC_DEV, 0x44, 0);
+ pci_write_config32(SOC_LPC_DEV, 0x48, 0);
+
+ dword = pm_read32(0x90);
+ dword |= 1 << 16;
+ pm_write32(0x90, dword);
+
+ dword = pm_read32(0x74);
+ dword |= 3 << 10;
+ pm_write32(0x74, dword);
}