diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-03-16 08:40:06 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-16 11:46:58 +0000 |
| commit | 74aa99a5435ce3a1b984a3e0e5a0b696d6f6165d (patch) | |
| tree | f4b9a4812620dedae0d786340bbf18ab247cc395 /src/mainboard | |
| parent | 4b7202e250b322e6347de5483abb61bbf92de18c (diff) | |
| download | coreboot-74aa99a5435ce3a1b984a3e0e5a0b696d6f6165d.tar.xz | |
src: Drop unused '#include <halt.h>'
Change-Id: Ie7afe77053a21bcf6a1bf314570f897d1791a620
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/butterfly/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/google/link/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/google/parrot/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/google/stout/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/intel/emeraldlake2/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/kontron/ktqm77/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/samsung/lumpy/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/samsung/stumpy/romstage.c | 1 |
8 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c index 726e561e39..6dfbfcb8a0 100644 --- a/src/mainboard/google/butterfly/romstage.c +++ b/src/mainboard/google/butterfly/romstage.c @@ -25,7 +25,6 @@ #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> -#include <halt.h> #if CONFIG(CHROMEOS) #include <vendorcode/google/chromeos/chromeos.h> #endif diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index 46e2d608b6..66a503d0b1 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -27,7 +27,6 @@ #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/common/gpio.h> #include "ec/google/chromeec/ec.h" -#include <halt.h> #include <cbfs.h> #include <southbridge/intel/bd82x6x/chip.h> diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c index ce902bef41..da6b50d76f 100644 --- a/src/mainboard/google/parrot/romstage.c +++ b/src/mainboard/google/parrot/romstage.c @@ -25,7 +25,6 @@ #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> -#include <halt.h> #include "ec/compal/ene932/ec.h" void pch_enable_lpc(void) diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index f60f8228b1..d76e9c184c 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -26,7 +26,6 @@ #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> -#include <halt.h> #include <bootmode.h> #include <ec/quanta/it8518/ec.h> #include "ec.h" diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index a9b80e8285..1259fe8a04 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -26,7 +26,6 @@ #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> -#include <halt.h> #define SIO_PORT 0x164e diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c index 6539cde812..0ea982c029 100644 --- a/src/mainboard/kontron/ktqm77/romstage.c +++ b/src/mainboard/kontron/ktqm77/romstage.c @@ -21,7 +21,6 @@ #include <cpu/x86/lapic.h> #include <cpu/x86/msr.h> #include <device/pci_def.h> -#include <halt.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <northbridge/intel/sandybridge/raminit.h> #include <northbridge/intel/sandybridge/sandybridge.h> diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index 74d491f310..1080689d4a 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -28,7 +28,6 @@ #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> -#include <halt.h> #include "option_table.h" #if CONFIG(DRIVERS_UART_8250IO) #include <superio/smsc/lpc47n207/lpc47n207.h> diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index 9450aa1a19..57fdbcbad0 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -29,7 +29,6 @@ #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> -#include <halt.h> #if CONFIG(DRIVERS_UART_8250IO) #include <superio/smsc/lpc47n207/lpc47n207.h> #endif |