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| author | Paul Menzel <paulepanter@users.sourceforge.net> | 2017-04-14 19:37:14 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2017-04-17 22:57:38 +0200 |
| commit | 79a27ac8b810e15509ec5656fa4b44b906f09385 (patch) | |
| tree | 4e2b94c537c20338b3b4d7975a36700c5d54c326 /src/mainboard | |
| parent | aeb6101a78d0b75fc02a919281f341db64938185 (diff) | |
| download | coreboot-79a27ac8b810e15509ec5656fa4b44b906f09385.tar.xz | |
mb/lenovo/t60: Remove PCI reset code from romstage
Commit bf264e94 (i945:) adds a PCI reset to the romstage, and commit
bc8613ec (Fix i945 based boards) fixes that to use the correct
delay of 200 ms. This code was then copied over, when adding support for
the Lenovo T60.
The reset was related to the shipped crypto card on the Roda RK886EX and
Kontron 986LCD-M, so is not needed on the Lenovo T60. So remove it, to
reduce the boot time by 200 ms.
The same change is done for the Lenovo X60 in commit 7676730b
(mb/lenovo/x60: Remove PCI reset code from romstage).
Change-Id: Ifff43f095a1236c9e9a9ef0687e8efe42e72c971
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/19298
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/lenovo/t60/romstage.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index 2686635d13..cb3f8bc85e 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -181,11 +181,6 @@ void mainboard_romstage_entry(unsigned long bist) if (bist == 0) enable_lapic(); - /* Force PCIRST# */ - pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, SBR); - udelay(200 * 1000); - pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, 0); - ich7_enable_lpc(); /* We want early GPIO setup, to be able to detect legacy I/O module */ |