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authorYinghai Lu <yinghailu@gmail.com>2006-05-04 01:05:22 +0000
committerYinghai Lu <yinghailu@gmail.com>2006-05-04 01:05:22 +0000
commit7ac38a33f630112bc2b4caa35162a540afaa2d09 (patch)
treed730870f06be1492bbdebc7abe2dffaba1e6efc2 /src/mainboard
parent52377deec00798261a09bac6263291f9461756bb (diff)
downloadcoreboot-7ac38a33f630112bc2b4caa35162a540afaa2d09.tar.xz
don't wait core0 started twice
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2295 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/serengeti_leopard/cache_as_ram_auto.c6
-rw-r--r--src/mainboard/tyan/s2881/cache_as_ram_auto.c7
-rw-r--r--src/mainboard/tyan/s2885/cache_as_ram_auto.c9
-rw-r--r--src/mainboard/tyan/s2891/cache_as_ram_auto.c7
-rw-r--r--src/mainboard/tyan/s2892/cache_as_ram_auto.c4
-rw-r--r--src/mainboard/tyan/s2895/cache_as_ram_auto.c5
-rw-r--r--src/mainboard/tyan/s4882/cache_as_ram_auto.c7
7 files changed, 21 insertions, 24 deletions
diff --git a/src/mainboard/amd/serengeti_leopard/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_leopard/cache_as_ram_auto.c
index 965e439f49..c31e9e6dab 100644
--- a/src/mainboard/amd/serengeti_leopard/cache_as_ram_auto.c
+++ b/src/mainboard/amd/serengeti_leopard/cache_as_ram_auto.c
@@ -241,13 +241,13 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
#endif
needs_reset = setup_coherent_ht_domain();
-
+
+ wait_all_core0_started();
#if CONFIG_LOGICAL_CPUS==1
// It is said that we should start core1 after all core0 launched
- wait_all_core0_started();
start_other_cores();
+ wait_all_other_cores_started(bsp_apicid);
#endif
- wait_all_aps_started(bsp_apicid);
needs_reset |= ht_setup_chains_x();
diff --git a/src/mainboard/tyan/s2881/cache_as_ram_auto.c b/src/mainboard/tyan/s2881/cache_as_ram_auto.c
index 67a32140ad..50c543592b 100644
--- a/src/mainboard/tyan/s2881/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2881/cache_as_ram_auto.c
@@ -181,15 +181,14 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
setup_s2881_resource_map();
needs_reset = setup_coherent_ht_domain();
-
+
+ wait_all_core0_started();
#if CONFIG_LOGICAL_CPUS==1
// It is said that we should start core1 after all core0 launched
- wait_all_core0_started();
start_other_cores();
+ wait_all_other_cores_started(bsp_apicid);
#endif
- wait_all_aps_started(bsp_apicid);
-
needs_reset |= ht_setup_chains_x();
if (needs_reset) {
diff --git a/src/mainboard/tyan/s2885/cache_as_ram_auto.c b/src/mainboard/tyan/s2885/cache_as_ram_auto.c
index 0c5792565c..13b66d8dc5 100644
--- a/src/mainboard/tyan/s2885/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2885/cache_as_ram_auto.c
@@ -181,15 +181,14 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
setup_s2885_resource_map();
needs_reset = setup_coherent_ht_domain();
-
+
+ wait_all_core0_started();
#if CONFIG_LOGICAL_CPUS==1
// It is said that we should start core1 after all core0 launched
- wait_all_core0_started();
start_other_cores();
+ wait_all_other_cores_started(bsp_apicid);
#endif
-
- wait_all_aps_started(bsp_apicid);
-
+
needs_reset |= ht_setup_chains_x();
if (needs_reset) {
diff --git a/src/mainboard/tyan/s2891/cache_as_ram_auto.c b/src/mainboard/tyan/s2891/cache_as_ram_auto.c
index 1bc29d9304..b83839a19c 100644
--- a/src/mainboard/tyan/s2891/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2891/cache_as_ram_auto.c
@@ -197,15 +197,14 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
setup_s2891_resource_map();
needs_reset = setup_coherent_ht_domain();
-
+
+ wait_all_core0_started();
#if CONFIG_LOGICAL_CPUS==1
// It is said that we should start core1 after all core0 launched
- wait_all_core0_started();
start_other_cores();
+ wait_all_other_cores_started(bsp_apicid);
#endif
- wait_all_aps_started(bsp_apicid);
-
needs_reset |= ht_setup_chains_x();
needs_reset |= ck804_early_setup_x();
diff --git a/src/mainboard/tyan/s2892/cache_as_ram_auto.c b/src/mainboard/tyan/s2892/cache_as_ram_auto.c
index 1936563518..6352fdf6e9 100644
--- a/src/mainboard/tyan/s2892/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2892/cache_as_ram_auto.c
@@ -206,10 +206,12 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
setup_s2892_resource_map();
needs_reset = setup_coherent_ht_domain();
-
+
+ wait_all_core0_started();
#if CONFIG_LOGICAL_CPUS==1
// It is said that we should start core1 after all core0 launched
start_other_cores();
+ wait_all_other_cores_started(bsp_apicid);
#endif
needs_reset |= ht_setup_chains_x();
diff --git a/src/mainboard/tyan/s2895/cache_as_ram_auto.c b/src/mainboard/tyan/s2895/cache_as_ram_auto.c
index 00bf1a6c23..299f345b71 100644
--- a/src/mainboard/tyan/s2895/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2895/cache_as_ram_auto.c
@@ -240,14 +240,13 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
needs_reset = setup_coherent_ht_domain();
+ wait_all_core0_started();
#if CONFIG_LOGICAL_CPUS==1
// It is said that we should start core1 after all core0 launched
- wait_all_core0_started();
start_other_cores();
+ wait_all_other_cores_started(bsp_apicid);
#endif
- wait_all_aps_started(bsp_apicid);
-
needs_reset |= ht_setup_chains_x();
needs_reset |= ck804_early_setup_x();
diff --git a/src/mainboard/tyan/s4882/cache_as_ram_auto.c b/src/mainboard/tyan/s4882/cache_as_ram_auto.c
index 2b463d4d27..00378dfb9b 100644
--- a/src/mainboard/tyan/s4882/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s4882/cache_as_ram_auto.c
@@ -219,15 +219,14 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
setup_s4882_resource_map();
needs_reset = setup_coherent_ht_domain();
-
+
+ wait_all_core0_started();
#if CONFIG_LOGICAL_CPUS==1
// It is said that we should start core1 after all core0 launched
- wait_all_core0_started();
start_other_cores();
+ wait_all_other_cores_started(bsp_apicid);
#endif
- wait_all_aps_started(bsp_apicid);
-
// automatically set that for you, but you might meet tight space
needs_reset |= ht_setup_chains_x();