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authorCaveh Jalali <caveh@chromium.org>2018-08-10 16:41:23 -0700
committerPatrick Georgi <pgeorgi@google.com>2018-08-15 09:37:09 +0000
commit8cf059ae064b1d9924de06ce55226ec7485fe3d4 (patch)
treed52283499af3b07d3ea752b65a175676465d3690 /src/mainboard
parented365412b2856c1537d4172b1ebdd2e77010840a (diff)
downloadcoreboot-8cf059ae064b1d9924de06ce55226ec7485fe3d4.tar.xz
mb/google/atlas: Add DISPLAY_DCR_EN GPIO pin
This defines new GPIO pin for controlling the display panel CABC function. The default value is high (enabled). BUG=b:112154569 Change-Id: I29083ab18e37f929a55b450b143463c67fe0abea Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/28070 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/poppy/variants/atlas/gpio.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/poppy/variants/atlas/gpio.c b/src/mainboard/google/poppy/variants/atlas/gpio.c
index 51dbf69f54..c0ef9ef095 100644
--- a/src/mainboard/google/poppy/variants/atlas/gpio.c
+++ b/src/mainboard/google/poppy/variants/atlas/gpio.c
@@ -215,8 +215,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NC(GPP_E4),
/* E5 : SATA_DEVSLP1 ==> NC */
PAD_CFG_NC(GPP_E5),
- /* E6 : SATA_DEVSLP2 ==> NC */
- PAD_CFG_NC(GPP_E6),
+ /* E6 : SATA_DEVSLP2 ==> DISPLAY_DCR_EN */
+ PAD_CFG_GPO(GPP_E6, 1, DEEP),
/* E7 : CPU_GP1 ==> TOUCHSCREEN_INT_L */
PAD_CFG_GPI_APIC(GPP_E7, NONE, PLTRST),
/* E8 : SATALED# ==> NC */