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authorMatt Delco <delco@chromium.org>2018-07-27 14:17:29 -0700
committerPatrick Georgi <pgeorgi@google.com>2018-08-20 15:53:54 +0000
commit9084c3c31bf62bc5c38cf5a1edbd830e407675c6 (patch)
tree37c65dd3869bf2a727ffa77e8764b4953490b788 /src/mainboard
parent9557a34abeb8c2101a853f49e20a3671c4551aef (diff)
downloadcoreboot-9084c3c31bf62bc5c38cf5a1edbd830e407675c6.tar.xz
soc/intel/skylake: add CPPC support
ACPI 5.0 defines a method _CPC for "Continuous Performance Control" (CPPC). Linux has a driver that enables features like speed shift without consulting ACPI. Other OSes instead rely on this information and need a _CPC present. Prior to this change performance in Win10 never exceeds 80% and MSR 0x770 is 0, while with this change (and enabling eist) higher speeds can be achieved and the MSR value is now 1. Change-Id: Ib7e0ae13f4b664b51e42f963e53c71f8832be062 Signed-off-by: Matt Delco <delco@chromium.org> Reviewed-on: https://review.coreboot.org/27673 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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