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authorStefan Reinauer <stefan.reinauer@coreboot.org>2014-10-18 10:21:14 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2014-12-16 21:17:36 +0100
commitb59c5de056058899e5ea891d2fd65824a7df7887 (patch)
tree2692243976bcc1509d17bf96b4157c8d96fc7caf /src/mainboard
parent71b214553c952e790219864767ba7882c9aaae1f (diff)
downloadcoreboot-b59c5de056058899e5ea891d2fd65824a7df7887.tar.xz
Drop GX1, CS5330 and related boards
There is no Cache As Ram for these boards, let's get rid of them. Change-Id: Ib41f8cd64fc9a440838aea86076d6514aacb301c Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/7117 Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/Kconfig15
-rw-r--r--src/mainboard/advantech/Kconfig35
-rw-r--r--src/mainboard/advantech/pcm-5820/Kconfig45
-rw-r--r--src/mainboard/advantech/pcm-5820/board_info.txt5
-rw-r--r--src/mainboard/advantech/pcm-5820/devicetree.cb56
-rw-r--r--src/mainboard/advantech/pcm-5820/irq_tables.c45
-rw-r--r--src/mainboard/advantech/pcm-5820/romstage.c40
-rw-r--r--src/mainboard/asi/Kconfig38
-rw-r--r--src/mainboard/asi/mb_5blgp/Kconfig45
-rw-r--r--src/mainboard/asi/mb_5blgp/board_info.txt2
-rw-r--r--src/mainboard/asi/mb_5blgp/devicetree.cb55
-rw-r--r--src/mainboard/asi/mb_5blgp/irq_tables.c46
-rw-r--r--src/mainboard/asi/mb_5blgp/romstage.c40
-rw-r--r--src/mainboard/asi/mb_5blmp/Kconfig45
-rw-r--r--src/mainboard/asi/mb_5blmp/board_info.txt4
-rw-r--r--src/mainboard/asi/mb_5blmp/devicetree.cb48
-rw-r--r--src/mainboard/asi/mb_5blmp/irq_tables.c39
-rw-r--r--src/mainboard/asi/mb_5blmp/romstage.c41
-rw-r--r--src/mainboard/axus/Kconfig35
-rw-r--r--src/mainboard/axus/tc320/Kconfig46
-rw-r--r--src/mainboard/axus/tc320/board_info.txt2
-rw-r--r--src/mainboard/axus/tc320/devicetree.cb55
-rw-r--r--src/mainboard/axus/tc320/irq_tables.c122
-rw-r--r--src/mainboard/axus/tc320/romstage.c41
-rw-r--r--src/mainboard/bcom/Kconfig3
-rw-r--r--src/mainboard/bcom/winnet100/Kconfig46
-rw-r--r--src/mainboard/bcom/winnet100/board_info.txt4
-rw-r--r--src/mainboard/bcom/winnet100/devicetree.cb56
-rw-r--r--src/mainboard/bcom/winnet100/irq_tables.c121
-rw-r--r--src/mainboard/bcom/winnet100/romstage.c41
-rw-r--r--src/mainboard/eaglelion/5bcm/Kconfig45
-rw-r--r--src/mainboard/eaglelion/5bcm/board_info.txt1
-rw-r--r--src/mainboard/eaglelion/5bcm/cmos.layout72
-rw-r--r--src/mainboard/eaglelion/5bcm/devicetree.cb52
-rw-r--r--src/mainboard/eaglelion/5bcm/irq_tables.c31
-rw-r--r--src/mainboard/eaglelion/5bcm/romstage.c22
-rw-r--r--src/mainboard/eaglelion/Kconfig35
-rw-r--r--src/mainboard/iei/Kconfig9
-rw-r--r--src/mainboard/iei/juki-511p/Kconfig47
-rw-r--r--src/mainboard/iei/juki-511p/board_info.txt2
-rw-r--r--src/mainboard/iei/juki-511p/cmos.layout72
-rw-r--r--src/mainboard/iei/juki-511p/devicetree.cb57
-rw-r--r--src/mainboard/iei/juki-511p/irq_tables.c103
-rw-r--r--src/mainboard/iei/juki-511p/romstage.c47
-rw-r--r--src/mainboard/iei/nova4899r/Kconfig46
-rw-r--r--src/mainboard/iei/nova4899r/board_info.txt2
-rw-r--r--src/mainboard/iei/nova4899r/cmos.layout72
-rw-r--r--src/mainboard/iei/nova4899r/devicetree.cb64
-rw-r--r--src/mainboard/iei/nova4899r/irq_tables.c214
-rw-r--r--src/mainboard/iei/nova4899r/romstage.c42
-rw-r--r--src/mainboard/iei/rocky-512/Kconfig9
-rw-r--r--src/mainboard/iei/rocky-512/board_info.txt3
-rw-r--r--src/mainboard/televideo/Kconfig35
-rw-r--r--src/mainboard/televideo/tc7020/Kconfig45
-rw-r--r--src/mainboard/televideo/tc7020/board_info.txt2
-rw-r--r--src/mainboard/televideo/tc7020/devicetree.cb57
-rw-r--r--src/mainboard/televideo/tc7020/irq_tables.c148
-rw-r--r--src/mainboard/televideo/tc7020/romstage.c41
58 files changed, 0 insertions, 2591 deletions
diff --git a/src/mainboard/Kconfig b/src/mainboard/Kconfig
index 29b439cd03..6ba6b718b1 100644
--- a/src/mainboard/Kconfig
+++ b/src/mainboard/Kconfig
@@ -12,8 +12,6 @@ config VENDOR_ADLINK
bool "ADLINK"
config VENDOR_ADVANSUS
bool "Advansus"
-config VENDOR_ADVANTECH
- bool "Advantech"
config VENDOR_AMD
bool "AMD"
config VENDOR_AOPEN
@@ -24,8 +22,6 @@ config VENDOR_ARIMA
bool "Arima"
config VENDOR_ARTECGROUP
bool "Artec Group"
-config VENDOR_ASI
- bool "ASI"
config VENDOR_ASROCK
bool "ASROCK"
config VENDOR_ASUS
@@ -34,8 +30,6 @@ config VENDOR_A_TREND
bool "A-Trend"
config VENDOR_AVALUE
bool "AVALUE"
-config VENDOR_AXUS
- bool "AXUS"
config VENDOR_AZZA
bool "AZZA"
config VENDOR_BACHMANN
@@ -56,8 +50,6 @@ config VENDOR_DIGITALLOGIC
bool "DIGITAL-LOGIC"
config VENDOR_DMP
bool "DMP"
-config VENDOR_EAGLELION
- bool "EagleLion"
config VENDOR_ECS
bool "ECS"
config VENDOR_EMULATION
@@ -130,8 +122,6 @@ config VENDOR_TECHNEXION
bool "Technexion"
config VENDOR_TECHNOLOGIC
bool "Technologic"
-config VENDOR_TELEVIDEO
- bool "TeleVideo"
config VENDOR_TI
bool "TI"
config VENDOR_THOMSON
@@ -154,17 +144,14 @@ source "src/mainboard/aaeon/Kconfig"
source "src/mainboard/abit/Kconfig"
source "src/mainboard/adlink/Kconfig"
source "src/mainboard/advansus/Kconfig"
-source "src/mainboard/advantech/Kconfig"
source "src/mainboard/amd/Kconfig"
source "src/mainboard/aopen/Kconfig"
source "src/mainboard/apple/Kconfig"
source "src/mainboard/arima/Kconfig"
source "src/mainboard/artecgroup/Kconfig"
-source "src/mainboard/asi/Kconfig"
source "src/mainboard/asrock/Kconfig"
source "src/mainboard/asus/Kconfig"
source "src/mainboard/avalue/Kconfig"
-source "src/mainboard/axus/Kconfig"
source "src/mainboard/azza/Kconfig"
source "src/mainboard/bachmann/Kconfig"
source "src/mainboard/bcom/Kconfig"
@@ -175,7 +162,6 @@ source "src/mainboard/compaq/Kconfig"
source "src/mainboard/cubietech/Kconfig"
source "src/mainboard/digitallogic/Kconfig"
source "src/mainboard/dmp/Kconfig"
-source "src/mainboard/eaglelion/Kconfig"
source "src/mainboard/ecs/Kconfig"
source "src/mainboard/emulation/Kconfig"
source "src/mainboard/getac/Kconfig"
@@ -212,7 +198,6 @@ source "src/mainboard/sunw/Kconfig"
source "src/mainboard/supermicro/Kconfig"
source "src/mainboard/technexion/Kconfig"
source "src/mainboard/technologic/Kconfig"
-source "src/mainboard/televideo/Kconfig"
source "src/mainboard/thomson/Kconfig"
source "src/mainboard/ti/Kconfig"
source "src/mainboard/traverse/Kconfig"
diff --git a/src/mainboard/advantech/Kconfig b/src/mainboard/advantech/Kconfig
deleted file mode 100644
index ab46f96287..0000000000
--- a/src/mainboard/advantech/Kconfig
+++ /dev/null
@@ -1,35 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if VENDOR_ADVANTECH
-
-choice
- prompt "Mainboard model"
-
-config BOARD_ADVANTECH_PCM_5820
- bool "PCM-5820"
-
-endchoice
-
-source "src/mainboard/advantech/pcm-5820/Kconfig"
-
-config MAINBOARD_VENDOR
- string
- default "Advantech"
-
-endif # VENDOR_ADVANTECH
diff --git a/src/mainboard/advantech/pcm-5820/Kconfig b/src/mainboard/advantech/pcm-5820/Kconfig
deleted file mode 100644
index 86bcd7ac17..0000000000
--- a/src/mainboard/advantech/pcm-5820/Kconfig
+++ /dev/null
@@ -1,45 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if BOARD_ADVANTECH_PCM_5820
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_AMD_GEODE_GX1
- select NORTHBRIDGE_AMD_GX1
- select SOUTHBRIDGE_AMD_CS5530
- select SUPERIO_WINBOND_W83977F
- select ROMCC
- select HAVE_PIRQ_TABLE
- select PIRQ_ROUTE
- select UDELAY_TSC
- select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
- string
- default advantech/pcm-5820
-
-config MAINBOARD_PART_NUMBER
- string
- default "PCM-5820"
-
-config IRQ_SLOT_COUNT
- int
- default 2
-
-endif # BOARD_ADVANTECH_PCM_5820
diff --git a/src/mainboard/advantech/pcm-5820/board_info.txt b/src/mainboard/advantech/pcm-5820/board_info.txt
deleted file mode 100644
index 84b3c8da4d..0000000000
--- a/src/mainboard/advantech/pcm-5820/board_info.txt
+++ /dev/null
@@ -1,5 +0,0 @@
-Category: half
-Board URL: http://taiwan.advantech.com.tw/products/Model_Detail.asp?model_id=1-1TGZL8
-ROM package: PLCC32
-ROM socketed: y
-Flashrom support: y
diff --git a/src/mainboard/advantech/pcm-5820/devicetree.cb b/src/mainboard/advantech/pcm-5820/devicetree.cb
deleted file mode 100644
index 8027ee20aa..0000000000
--- a/src/mainboard/advantech/pcm-5820/devicetree.cb
+++ /dev/null
@@ -1,56 +0,0 @@
-chip northbridge/amd/gx1 # Northbridge
- device domain 0 on # PCI domain
- device pci 0.0 on end # Host bridge
- chip southbridge/amd/cs5530 # Southbridge
- device pci 12.0 on # ISA bridge
- chip superio/winbond/w83977f # SUper I/O
- device pnp 3f0.0 on # Floppy
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 3f0.1 on # Parallel port
- io 0x60 = 0x378
- irq 0x70 = 7
- end
- device pnp 3f0.2 on # COM1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 3f0.3 on # COM2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 3f0.4 on # RTC / On-Now control
- io 0x60 = 0x70
- irq 0x70 = 8
- end
- device pnp 3f0.5 on # PS/2 keyboard / mouse
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1 # PS/2 keyboard interrupt
- irq 0x72 = 12 # PS/2 mouse interrupt
- end
- device pnp 3f0.6 on # IR
- # TODO?
- end
- device pnp 3f0.7 on # GPIO 1
- # TODO?
- end
- device pnp 3f0.8 on # GPIO 2
- # TODO?
- end
- end
- end
- device pci 12.1 on end # SMI
- device pci 12.2 on end # IDE
- device pci 12.3 on end # Audio (onboard)
- device pci 12.4 on end # VGA
- device pci 13.0 on end # USB
- register "ide0_enable" = "1"
- register "ide1_enable" = "1"
- end
- end
- chip cpu/amd/geode_gx1 # CPU
- end
-end
diff --git a/src/mainboard/advantech/pcm-5820/irq_tables.c b/src/mainboard/advantech/pcm-5820/irq_tables.c
deleted file mode 100644
index ac25227691..0000000000
--- a/src/mainboard/advantech/pcm-5820/irq_tables.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
- PIRQ_SIGNATURE,
- PIRQ_VERSION,
- 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
- 0x00, /* Interrupt router bus */
- (0x12 << 3) | 0x0, /* Interrupt router device */
- 0xc00, /* IRQs devoted exclusively to PCI usage */
- 0x1078, /* Vendor */
- 0x2, /* Device */
- 0, /* Miniport data */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0xde, /* Checksum */
- {
- /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
- {0x00, (0x0b << 3) | 0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0x0deb8}}, 0x1, 0x0},
- {0x00, (0x13 << 3) | 0x0, {{0x01, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
- }
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/advantech/pcm-5820/romstage.c b/src/mainboard/advantech/pcm-5820/romstage.c
deleted file mode 100644
index 77cb154172..0000000000
--- a/src/mainboard/advantech/pcm-5820/romstage.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <stdint.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include "northbridge/amd/gx1/raminit.c"
-#include "cpu/x86/bist.h"
-#include "superio/winbond/w83977f/early_serial.c"
-#include "southbridge/amd/cs5530/enable_rom.c"
-
-#define SERIAL_DEV PNP_DEV(0x3f0, W83977F_SP1)
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
- w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
- report_bist_failure(bist);
- cs5530_enable_rom();
- sdram_init();
-}
diff --git a/src/mainboard/asi/Kconfig b/src/mainboard/asi/Kconfig
deleted file mode 100644
index 29f0895fb0..0000000000
--- a/src/mainboard/asi/Kconfig
+++ /dev/null
@@ -1,38 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if VENDOR_ASI
-
-choice
- prompt "Mainboard model"
-
-config BOARD_ASI_MB_5BLGP
- bool "MB-5BLGP"
-config BOARD_ASI_MB_5BLMP
- bool "MB-5BLMP"
-
-endchoice
-
-source "src/mainboard/asi/mb_5blgp/Kconfig"
-source "src/mainboard/asi/mb_5blmp/Kconfig"
-
-config MAINBOARD_VENDOR
- string
- default "ASI"
-
-endif # VENDOR_ASI
diff --git a/src/mainboard/asi/mb_5blgp/Kconfig b/src/mainboard/asi/mb_5blgp/Kconfig
deleted file mode 100644
index f69f6efafb..0000000000
--- a/src/mainboard/asi/mb_5blgp/Kconfig
+++ /dev/null
@@ -1,45 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if BOARD_ASI_MB_5BLGP
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_AMD_GEODE_GX1
- select NORTHBRIDGE_AMD_GX1
- select SOUTHBRIDGE_AMD_CS5530
- select SUPERIO_NSC_PC87351
- select ROMCC
- select HAVE_PIRQ_TABLE
- select PIRQ_ROUTE
- select UDELAY_TSC
- select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
- string
- default asi/mb_5blgp
-
-config MAINBOARD_PART_NUMBER
- string
- default "MB-5BLGP"
-
-config IRQ_SLOT_COUNT
- int
- default 3
-
-endif # BOARD_ASI_MB_5BLGP
diff --git a/src/mainboard/asi/mb_5blgp/board_info.txt b/src/mainboard/asi/mb_5blgp/board_info.txt
deleted file mode 100644
index 0dcbbea5c1..0000000000
--- a/src/mainboard/asi/mb_5blgp/board_info.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-Board name: MB-5BLGP (Neoware Eon 4000s)
-Category: settop
diff --git a/src/mainboard/asi/mb_5blgp/devicetree.cb b/src/mainboard/asi/mb_5blgp/devicetree.cb
deleted file mode 100644
index d84bf0e045..0000000000
--- a/src/mainboard/asi/mb_5blgp/devicetree.cb
+++ /dev/null
@@ -1,55 +0,0 @@
-chip northbridge/amd/gx1 # Northbridge
- device domain 0 on # PCI domain
- device pci 0.0 on end # Host bridge
- chip southbridge/amd/cs5530 # Southbridge
- device pci 0f.0 on end # Ethernet
- device pci 12.0 on # ISA bridge
- chip superio/nsc/pc87351 # Super I/O
- device pnp 2e.0 off # Floppy
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 2e.1 on # Parallel port
- io 0x60 = 0x378
- irq 0x70 = 7
- end
- device pnp 2e.2 on # COM2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.e on # COM1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.4 on # System wake-up control (SWC)
- irq 0x60 = 0x500
- end
- device pnp 2e.5 on # PS/2 mouse
- irq 0x70 = 12
- end
- device pnp 2e.6 on # PS/2 keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1
- end
- device pnp 2e.7 on # GPIO
- irq 0x60 = 0x800
- end
- device pnp 2e.8 on # Fan speed control
- irq 0x60 = 0x900
- end
- end
- end
- device pci 12.1 off end # SMI
- device pci 12.2 on end # IDE
- device pci 12.3 on end # Audio
- device pci 12.4 on end # VGA
- device pci 13.0 on end # USB
- register "ide0_enable" = "1"
- register "ide1_enable" = "0" # No connector on this board
- end
- end
- chip cpu/amd/geode_gx1 # CPU
- end
-end
diff --git a/src/mainboard/asi/mb_5blgp/irq_tables.c b/src/mainboard/asi/mb_5blgp/irq_tables.c
deleted file mode 100644
index b37e8f99d0..0000000000
--- a/src/mainboard/asi/mb_5blgp/irq_tables.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
- PIRQ_SIGNATURE,
- PIRQ_VERSION,
- 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
- 0x00, /* Interrupt router bus */
- (0x12 << 3) | 0x0, /* Interrupt router device */
- 0x8800, /* IRQs devoted exclusively to PCI usage */
- 0x1078, /* Vendor */
- 0x2, /* Device */
- 0, /* Miniport data */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0x96, /* Checksum */
- {
- /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
- {0x00, (0x07 << 3) | 0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0x0deb8}}, 0x1, 0x0}, /* ISA slot (?) */
- {0x00, (0x0f << 3) | 0x0, {{0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0xdeb8}, {0x02, 0x0deb8}}, 0x2, 0x0}, /* NIC */
- {0x00, (0x13 << 3) | 0x0, {{0x01, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, /* USB */
- }
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/asi/mb_5blgp/romstage.c b/src/mainboard/asi/mb_5blgp/romstage.c
deleted file mode 100644
index ac76f34e88..0000000000
--- a/src/mainboard/asi/mb_5blgp/romstage.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <stdint.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include "northbridge/amd/gx1/raminit.c"
-#include "cpu/x86/bist.h"
-#include "superio/nsc/pc87351/early_serial.c"
-#include "southbridge/amd/cs5530/enable_rom.c"
-
-#define SERIAL_DEV PNP_DEV(0x2e, PC87351_SP1)
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
- pc87351_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
- report_bist_failure(bist);
- cs5530_enable_rom();
- sdram_init();
-}
diff --git a/src/mainboard/asi/mb_5blmp/Kconfig b/src/mainboard/asi/mb_5blmp/Kconfig
deleted file mode 100644
index a40c86c328..0000000000
--- a/src/mainboard/asi/mb_5blmp/Kconfig
+++ /dev/null
@@ -1,45 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if BOARD_ASI_MB_5BLMP
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_AMD_GEODE_GX1
- select NORTHBRIDGE_AMD_GX1
- select SOUTHBRIDGE_AMD_CS5530
- select SUPERIO_NSC_PC87351
- select ROMCC
- select HAVE_PIRQ_TABLE
- select PIRQ_ROUTE
- select UDELAY_TSC
- select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
- string
- default asi/mb_5blmp
-
-config MAINBOARD_PART_NUMBER
- string
- default "MB-5BLMP"
-
-config IRQ_SLOT_COUNT
- int
- default 5
-
-endif # BOARD_ASI_MB_5BLMP
diff --git a/src/mainboard/asi/mb_5blmp/board_info.txt b/src/mainboard/asi/mb_5blmp/board_info.txt
deleted file mode 100644
index da529cb739..0000000000
--- a/src/mainboard/asi/mb_5blmp/board_info.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-Board name: MB-5BLMP (IGEL WinNET III)
-Category: settop
-Board URL: http://www.hojerteknik.com/winnet.htm
-Flashrom support: y
diff --git a/src/mainboard/asi/mb_5blmp/devicetree.cb b/src/mainboard/asi/mb_5blmp/devicetree.cb
deleted file mode 100644
index e8e6ac3ca5..0000000000
--- a/src/mainboard/asi/mb_5blmp/devicetree.cb
+++ /dev/null
@@ -1,48 +0,0 @@
-chip northbridge/amd/gx1 # Northbridge
- device domain 0 on
- device pci 0.0 on end # Host bridge
- chip southbridge/amd/cs5530 # Southbridge
- device pci 0f.0 off end # Ethernet (Realtek RTL8139B)
- device pci 12.0 on # ISA bridge
- chip superio/nsc/pc87351 # Super I/O
- device pnp 2e.4 on # PS/2 keyboard (+ mouse?)
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1
- # irq 0x72 = 12
- end
- device pnp 2e.a on # PS/2 mouse
- irq 0x70 = 12
- end
- device pnp 2e.e on # COM1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.f off # Floppy
- io 0x60 = 0x3f2
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 2e.10 on # Parallel port
- io 0x60 = 0x378
- irq 0x70 = 7
- end
- device pnp 2e.12 on # COM2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- end
- end
- device pci 12.1 off end # SMI
- device pci 12.2 on end # IDE
- device pci 12.3 on end # Audio
- device pci 12.4 on end # VGA (onboard)
- device pci 13.0 on end # USB
- register "ide0_enable" = "1"
- register "ide1_enable" = "1"
- end
- end
- chip cpu/amd/geode_gx1 # CPU
- end
-end
-
diff --git a/src/mainboard/asi/mb_5blmp/irq_tables.c b/src/mainboard/asi/mb_5blmp/irq_tables.c
deleted file mode 100644
index 01d364daea..0000000000
--- a/src/mainboard/asi/mb_5blmp/irq_tables.c
+++ /dev/null
@@ -1,39 +0,0 @@
-/* TODO: This is currently copied from the IEI NOVA-4899R target, but it's
- * quite surely wrong for this board. It gets me further in the boot process
- * than using no irq_tables.c file at all, though!
- */
-
-/* TODO: Add license header. */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
- PIRQ_SIGNATURE, /* u32 signature */
- PIRQ_VERSION, /* u16 version */
- 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
- 0x00, /* Where the interrupt router lies (bus) */
- (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
- 0xe00, /* IRQs devoted exclusively to PCI usage */
- 0x1078, /* Vendor */
- 0x0002, /* Device */
- 0, /* Miniport data */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0x2d, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
- {
- /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
- // USB
- {0x00,(0x13<<3)|0x0, {{0x01, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
- // eth0
- {0x00,(0x0a<<3)|0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},//0x3, 0x0},
- // eth1
- {0x00,(0x0b<<3)|0x0, {{0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x02, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},//0x2, 0x0},
- // eth2
- {0x00,(0x0c<<3)|0x0, {{0x04, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},//0x1, 0x0},
- // PCI slot
- {0x00,(0x0f<<3)|0x0, {{0x04, 0xdeb8}, {0x03, 0xdeb8}, {0x02, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},
- }
-};
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/asi/mb_5blmp/romstage.c b/src/mainboard/asi/mb_5blmp/romstage.c
deleted file mode 100644
index 96e884d6dd..0000000000
--- a/src/mainboard/asi/mb_5blmp/romstage.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include "northbridge/amd/gx1/raminit.c"
-#include "superio/nsc/pc87351/early_serial.c"
-#include "cpu/x86/bist.h"
-#include "southbridge/amd/cs5530/enable_rom.c"
-
-#define SERIAL_DEV PNP_DEV(0x2e, PC87351_SP1)
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
- pc87351_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
- report_bist_failure(bist);
- cs5530_enable_rom();
- sdram_init();
-}
diff --git a/src/mainboard/axus/Kconfig b/src/mainboard/axus/Kconfig
deleted file mode 100644
index cdf807fead..0000000000
--- a/src/mainboard/axus/Kconfig
+++ /dev/null
@@ -1,35 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if VENDOR_AXUS
-
-choice
- prompt "Mainboard model"
-
-config BOARD_AXUS_TC320
- bool "TC320"
-
-endchoice
-
-source "src/mainboard/axus/tc320/Kconfig"
-
-config MAINBOARD_VENDOR
- string
- default "AXUS"
-
-endif # VENDOR_AXUS
diff --git a/src/mainboard/axus/tc320/Kconfig b/src/mainboard/axus/tc320/Kconfig
deleted file mode 100644
index 97c33aaebb..0000000000
--- a/src/mainboard/axus/tc320/Kconfig
+++ /dev/null
@@ -1,46 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if BOARD_AXUS_TC320
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_AMD_GEODE_GX1
- select NORTHBRIDGE_AMD_GX1
- select SOUTHBRIDGE_AMD_CS5530
- select SUPERIO_NSC_PC97317
- select ROMCC
- select HAVE_PIRQ_TABLE
- select PIRQ_ROUTE
- select UDELAY_TSC
- select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
- string
- default axus/tc320
-
-config MAINBOARD_PART_NUMBER
- string
- default "TC320"
-
-# Soldered NIC, internal USB, no real PCI slots.
-config IRQ_SLOT_COUNT
- int
- default 2
-
-endif # BOARD_AXUS_TC320
diff --git a/src/mainboard/axus/tc320/board_info.txt b/src/mainboard/axus/tc320/board_info.txt
deleted file mode 100644
index 005c28d14c..0000000000
--- a/src/mainboard/axus/tc320/board_info.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-Category: settop
-Board URL: http://www.keyton.co.jp/products/UAXT/TC-320.html
diff --git a/src/mainboard/axus/tc320/devicetree.cb b/src/mainboard/axus/tc320/devicetree.cb
deleted file mode 100644
index 970f71fb13..0000000000
--- a/src/mainboard/axus/tc320/devicetree.cb
+++ /dev/null
@@ -1,55 +0,0 @@
-chip northbridge/amd/gx1 # Northbridge
- device domain 0 on # PCI domain
- device pci 0.0 on end # Host bridge
- chip southbridge/amd/cs5530 # Southbridge
- device pci 12.0 on # ISA bridge
- chip superio/nsc/pc97317 # Super I/O
- device pnp 2e.0 on # PS/2 keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1
- end
- device pnp 2e.1 on # PS/2 mouse
- irq 0x70 = 12
- end
- device pnp 2e.2 on # RTC, advanced power control (APC)
- io 0x60 = 0x70
- irq 0x70 = 8
- end
- device pnp 2e.3 off # Floppy (N/A on this board)
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 2e.4 on # Parallel port
- io 0x60 = 0x378
- irq 0x70 = 7
- end
- device pnp 2e.5 off # COM2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.6 on # COM1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.7 on # GPIO
- io 0x60 = 0xe0
- end
- device pnp 2e.8 on # Power management
- io 0x60 = 0xe800
- end
- end
- end
- device pci 12.1 off end # SMI
- device pci 12.2 off end # IDE
- device pci 12.3 on end # Audio
- device pci 12.4 on end # VGA (onboard)
- device pci 13.0 on end # USB
- # register "ide0_enable" = "1"
- # register "ide1_enable" = "1"
- end
- end
- chip cpu/amd/geode_gx1 # CPU
- end
-end
diff --git a/src/mainboard/axus/tc320/irq_tables.c b/src/mainboard/axus/tc320/irq_tables.c
deleted file mode 100644
index 71cf2e1ef7..0000000000
--- a/src/mainboard/axus/tc320/irq_tables.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-/**
- * @file
- * Interrupt routing description for the AXUS TC320 board.
- * It was not possible to read back the PIRQ table. There was no BIOS to ask
- * for it, only a bootloader for an embedded OS.
- * But with the method described here:
- * http://coreboot.org/Creating_Valid_IRQ_Tables
- * it was possible to detect the physical IRQ routing on this board.
- *
- * This is the physical routing on this board:
- *
- * IRQ 5530 USB Network
- * controller northbridge device device
- * 00.13.0 00.0e.00
- * --------------------------------------------
- * 11 INTA# INTA# n.c.
- * 15 INTB# n.c. INTA#
- * INTC# n.c. n.c.
- * INTD# n.c. n.c.
- */
-
-#include <arch/pirq_routing.h>
-
-#define INT_A 0x01
-#define INT_B 0x02
-#define INT_C 0x03
-#define INT_D 0x04
-
-/*
- * The USB controller should be connected to IRQ11,
- * the network controller should be connected to IRQ15.
- */
-
-#define IRQ_BITMAP_LINK0 0x0800
-#define IRQ_BITMAP_LINK1 0x8000
-#define IRQ_BITMAP_LINK2 0x0000
-#define IRQ_BITMAP_LINK3 0x0000
-
-/** Reserved interrupt channels for exclusive PCI usage. */
-#define IRQ_DEVOTED_TO_PCI (IRQ_BITMAP_LINK0 | IRQ_BITMAP_LINK1)
-
-/**
- * Routing description.
- * Documentation at: http://www.microsoft.com/whdc/archive/pciirq.mspx
- */
-static const struct irq_routing_table intel_irq_routing_table = {
- .signature = PIRQ_SIGNATURE, /* PIRQ signature */
- .version = PIRQ_VERSION, /* PIRQ version */
- .size = 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. CONFIG_IRQ_SLOT_COUNT devices */
- .rtr_bus = 0x00, /* Interrupt router bus */
- .rtr_devfn = (0x12 << 3) | 0x0, /* Interrupt router device */
- .exclusive_irqs = IRQ_DEVOTED_TO_PCI, /* IRQs devoted to PCI */
- .rtr_vendor = 0x1078, /* Vendor */
- .rtr_device = 0x0100, /* Device */
- .miniport_data = 0, /* Miniport data */
- .checksum = 0xe3, /* Checksum */
- .slots = {
- /*
- * Definition for "slot#1". There is no real slot,
- * the USB device is embedded...
- */
- [0] = {
- .bus = 0x00,
- .devfn = (0x13 << 3) | 0x0,
- .irq = {
- /* Link Bitmap */
- [0] = { INT_A, IRQ_BITMAP_LINK0 },
- [1] = { INT_B, IRQ_BITMAP_LINK1 },
- [2] = { INT_C, IRQ_BITMAP_LINK2 },
- [3] = { INT_D, IRQ_BITMAP_LINK3 },
- },
- .slot = 0x0,
- },
- /*
- * Definition for "slot#2". There is no real slot,
- * the network device is soldered...
- */
- [1] = {
- .bus = 0x00,
- .devfn = (0x0e << 3) | 0x0,
- .irq = {
- /* Link Bitmap */
- [0] = { INT_B, IRQ_BITMAP_LINK1 },
- [1] = { INT_C, IRQ_BITMAP_LINK2 },
- [2] = { INT_D, IRQ_BITMAP_LINK3 },
- [3] = { INT_A, IRQ_BITMAP_LINK0 },
- },
- .slot = 0x0,
- }
- }
-};
-
-/**
- * Copy the IRQ routing table to memory.
- *
- * @param[in] addr Destination address (between 0xF0000...0x100000).
- * @return TODO.
- */
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/axus/tc320/romstage.c b/src/mainboard/axus/tc320/romstage.c
deleted file mode 100644
index 158a45fbde..0000000000
--- a/src/mainboard/axus/tc320/romstage.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include "northbridge/amd/gx1/raminit.c"
-#include "superio/nsc/pc97317/early_serial.c"
-#include "cpu/x86/bist.h"
-#include "southbridge/amd/cs5530/enable_rom.c"
-
-#define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1)
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
- pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
- report_bist_failure(bist);
- cs5530_enable_rom();
- sdram_init();
-}
diff --git a/src/mainboard/bcom/Kconfig b/src/mainboard/bcom/Kconfig
index 60945d6903..5c7e41bdc0 100644
--- a/src/mainboard/bcom/Kconfig
+++ b/src/mainboard/bcom/Kconfig
@@ -21,14 +21,11 @@ if VENDOR_BCOM
choice
prompt "Mainboard model"
-config BOARD_BCOM_WINNET100
- bool "WinNET100"
config BOARD_BCOM_WINNETP680
bool "WinNET P680"
endchoice
-source "src/mainboard/bcom/winnet100/Kconfig"
source "src/mainboard/bcom/winnetp680/Kconfig"
config MAINBOARD_VENDOR
diff --git a/src/mainboard/bcom/winnet100/Kconfig b/src/mainboard/bcom/winnet100/Kconfig
deleted file mode 100644
index 503c92b63c..0000000000
--- a/src/mainboard/bcom/winnet100/Kconfig
+++ /dev/null
@@ -1,46 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if BOARD_BCOM_WINNET100
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_AMD_GEODE_GX1
- select NORTHBRIDGE_AMD_GX1
- select SOUTHBRIDGE_AMD_CS5530
- select SUPERIO_NSC_PC97317
- select ROMCC
- select HAVE_PIRQ_TABLE
- select PIRQ_ROUTE
- select UDELAY_TSC
- select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
- string
- default bcom/winnet100
-
-config MAINBOARD_PART_NUMBER
- string
- default "WinNET100"
-
-# Soldered NIC, internal USB, no real PCI slots.
-config IRQ_SLOT_COUNT
- int
- default 2
-
-endif # BOARD_BCOM_WINNET100
diff --git a/src/mainboard/bcom/winnet100/board_info.txt b/src/mainboard/bcom/winnet100/board_info.txt
deleted file mode 100644
index 85e561a2b8..0000000000
--- a/src/mainboard/bcom/winnet100/board_info.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-Category: settop
-Board name: WinNET100 (IGEL-316)
-Board URL: http://web.archive.org/web/20031207003521/http://www.igel.co.za/igel_316_compact.htm
-Flashrom support: y
diff --git a/src/mainboard/bcom/winnet100/devicetree.cb b/src/mainboard/bcom/winnet100/devicetree.cb
deleted file mode 100644
index 61a71e6210..0000000000
--- a/src/mainboard/bcom/winnet100/devicetree.cb
+++ /dev/null
@@ -1,56 +0,0 @@
-chip northbridge/amd/gx1 # Northbridge
- device domain 0 on # PCI domain
- device pci 0.0 on end # Host bridge
- chip southbridge/amd/cs5530 # Southbridge
- device pci 0f.0 on end # Ethernet (onboard)
- device pci 12.0 on # ISA bridge
- chip superio/nsc/pc97317 # Super I/O
- device pnp 2e.0 on # PS/2 keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1
- end
- device pnp 2e.1 on # PS/2 mouse
- irq 0x70 = 12
- end
- device pnp 2e.2 on # RTC, Advanced power control (APC)
- io 0x60 = 0x70
- irq 0x70 = 8
- end
- device pnp 2e.3 off # Floppy (N/A on this board)
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 2e.4 on # Parallel port
- io 0x60 = 0x378
- irq 0x70 = 7
- end
- device pnp 2e.5 on # COM2 (used for smartcard reader)
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.6 on # COM1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.7 on # GPIO
- io 0x60 = 0xe0
- end
- device pnp 2e.8 on # Power management
- io 0x60 = 0xe8
- end
- end
- end
- device pci 12.1 off end # SMI
- device pci 12.2 on end # IDE
- device pci 12.3 on end # Audio
- device pci 12.4 on end # VGA (onboard)
- device pci 13.0 on end # USB
- register "ide0_enable" = "1"
- register "ide1_enable" = "0" # Not available/needed on this board
- end
- end
- chip cpu/amd/geode_gx1 # CPU
- end
-end
diff --git a/src/mainboard/bcom/winnet100/irq_tables.c b/src/mainboard/bcom/winnet100/irq_tables.c
deleted file mode 100644
index 8d9e157083..0000000000
--- a/src/mainboard/bcom/winnet100/irq_tables.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-/**
- * @file
- * Interrupt routing description for BCOM's Winnet100 board.
- * It was not possible to read back the pirq-Table. In the 0xF segment was
- * no string like $PIRQ...
- * But the already running 2.4.21 kernel provides eth0 IRQ15 and USB IRQ 11.
- * The Realtek was device 0.f.0, the USB 0.13.0.
- *
- * This is the physical routing on this board:
- *
- * 5530 USB Network
- * northbridge device device
- * 00.13.0 00.0f.00
- * ------------------------------------
- * INTA# INTA# n.c.
- * INTB# n.c. n.c.
- * INTC# n.c. INTA#
- * INTD# n.c. n.c.
- */
-
-#include <arch/pirq_routing.h>
-
-#define INT_A 0x01
-#define INT_B 0x02
-#define INT_C 0x03
-#define INT_D 0x04
-
-/*
- * The USB controller should be connected to IRQ11,
- * the network controller should be connected to IRQ15.
- */
-#define IRQ_BITMAP_LINK0 0x0800
-#define IRQ_BITMAP_LINK1 0x0400
-#define IRQ_BITMAP_LINK2 0x8000
-#define IRQ_BITMAP_LINK3 0x0200
-
-/** Reserved interrupt channels for exclusive PCI usage. */
-#define IRQ_DEVOTED_TO_PCI (IRQ_BITMAP_LINK0 | IRQ_BITMAP_LINK2)
-
-/**
- * Routing description.
- * Documentation at: http://www.microsoft.com/whdc/archive/pciirq.mspx
- */
-static const struct irq_routing_table intel_irq_routing_table = {
- .signature = PIRQ_SIGNATURE, /* PIRQ signature */
- .version = PIRQ_VERSION, /* PIRQ version */
- .size = 32 +16 * CONFIG_IRQ_SLOT_COUNT,/* Max. CONFIG_IRQ_SLOT_COUNT devices */
- .rtr_bus = 0x00, /* Interrupt router bus */
- .rtr_devfn = (0x12 << 3) | 0x0, /* Interrupt router device */
- .exclusive_irqs = IRQ_DEVOTED_TO_PCI, /* IRQs devoted to PCI */
- .rtr_vendor = 0x1078, /* Vendor */
- .rtr_device = 0x0100, /* Device */
- .miniport_data = 0, /* Miniport data */
- .checksum = 0xbf + 16, /* Checksum */
- .slots = {
- /*
- * Definition for "slot#1". There is no real slot,
- * the USB device is embedded...
- */
- [0] = {
- .bus = 0x00,
- .devfn = (0x13 << 3) | 0x0,
- .irq = {
- /* Link Bitmap */
- [0] = { INT_A, IRQ_BITMAP_LINK0 },
- [1] = { INT_B, IRQ_BITMAP_LINK1 },
- [2] = { INT_C, IRQ_BITMAP_LINK2 },
- [3] = { INT_D, IRQ_BITMAP_LINK3 },
- },
- .slot = 0x0,
- },
-
- /*
- * Definition for "slot#3". There is no real slot,
- * the network device is soldered...
- */
- [1] = {
- .bus = 0x00,
- .devfn = (0x0f << 3) | 0x0,
- .irq = {
- /* Link Bitmap */
- [0] = { INT_C, IRQ_BITMAP_LINK2 },
- [1] = { INT_D, IRQ_BITMAP_LINK3 },
- [2] = { INT_A, IRQ_BITMAP_LINK0 },
- [3] = { INT_B, IRQ_BITMAP_LINK1 },
- },
- .slot = 0x0,
- }
- }
-};
-
-/**
- * Copy the IRQ routing table to memory.
- *
- * @param[in] addr Destination address (between 0xF0000...0x100000).
- * @return TODO.
- */
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/bcom/winnet100/romstage.c b/src/mainboard/bcom/winnet100/romstage.c
deleted file mode 100644
index 158a45fbde..0000000000
--- a/src/mainboard/bcom/winnet100/romstage.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include "northbridge/amd/gx1/raminit.c"
-#include "superio/nsc/pc97317/early_serial.c"
-#include "cpu/x86/bist.h"
-#include "southbridge/amd/cs5530/enable_rom.c"
-
-#define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1)
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
- pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
- report_bist_failure(bist);
- cs5530_enable_rom();
- sdram_init();
-}
diff --git a/src/mainboard/eaglelion/5bcm/Kconfig b/src/mainboard/eaglelion/5bcm/Kconfig
deleted file mode 100644
index 3c0a800510..0000000000
--- a/src/mainboard/eaglelion/5bcm/Kconfig
+++ /dev/null
@@ -1,45 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if BOARD_EAGLELION_5BCM
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_AMD_GEODE_GX1
- select NORTHBRIDGE_AMD_GX1
- select SOUTHBRIDGE_AMD_CS5530
- select SUPERIO_NSC_PC97317
- select ROMCC
- select HAVE_PIRQ_TABLE
- select PIRQ_ROUTE
- select UDELAY_TSC
- select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
- string
- default eaglelion/5bcm
-
-config MAINBOARD_PART_NUMBER
- string
- default "5BCM"
-
-config IRQ_SLOT_COUNT
- int
- default 2
-
-endif # BOARD_EAGLELION_5BCM
diff --git a/src/mainboard/eaglelion/5bcm/board_info.txt b/src/mainboard/eaglelion/5bcm/board_info.txt
deleted file mode 100644
index 7680e6f854..0000000000
--- a/src/mainboard/eaglelion/5bcm/board_info.txt
+++ /dev/null
@@ -1 +0,0 @@
-Category: half
diff --git a/src/mainboard/eaglelion/5bcm/cmos.layout b/src/mainboard/eaglelion/5bcm/cmos.layout
deleted file mode 100644
index 9050c3db7a..0000000000
--- a/src/mainboard/eaglelion/5bcm/cmos.layout
+++ /dev/null
@@ -1,72 +0,0 @@
-entries
-
-#start-bit length config config-ID name
-#0 8 r 0 seconds
-#8 8 r 0 alarm_seconds
-#16 8 r 0 minutes
-#24 8 r 0 alarm_minutes
-#32 8 r 0 hours
-#40 8 r 0 alarm_hours
-#48 8 r 0 day_of_week
-#56 8 r 0 day_of_month
-#64 8 r 0 month
-#72 8 r 0 year
-#80 4 r 0 rate_select
-#84 3 r 0 REF_Clock
-#87 1 r 0 UIP
-#88 1 r 0 auto_switch_DST
-#89 1 r 0 24_hour_mode
-#90 1 r 0 binary_values_enable
-#91 1 r 0 square-wave_out_enable
-#92 1 r 0 update_finished_enable
-#93 1 r 0 alarm_interrupt_enable
-#94 1 r 0 periodic_interrupt_enable
-#95 1 r 0 disable_clock_updates
-#96 288 r 0 temporary_filler
-0 384 r 0 reserved_memory
-384 1 e 4 boot_option
-385 1 e 4 last_boot
-386 1 e 1 ECC_memory
-388 4 r 0 reboot_bits
-392 3 e 5 baud_rate
-400 1 e 1 power_on_after_fail
-412 4 e 6 debug_level
-416 4 e 7 boot_first
-420 4 e 7 boot_second
-424 4 e 7 boot_third
-428 4 h 0 boot_index
-432 8 h 0 boot_countdown
-1008 16 h 0 check_sum
-
-enumerations
-
-#ID value text
-1 0 Disable
-1 1 Enable
-2 0 Enable
-2 1 Disable
-4 0 Fallback
-4 1 Normal
-5 0 115200
-5 1 57600
-5 2 38400
-5 3 19200
-5 4 9600
-5 5 4800
-5 6 2400
-5 7 1200
-6 6 Notice
-6 7 Info
-6 8 Debug
-6 9 Spew
-7 0 Network
-7 1 HDD
-7 2 Floppy
-7 8 Fallback_Network
-7 9 Fallback_HDD
-7 10 Fallback_Floppy
-#7 3 ROM
-
-checksums
-
-checksum 392 1007 1008
diff --git a/src/mainboard/eaglelion/5bcm/devicetree.cb b/src/mainboard/eaglelion/5bcm/devicetree.cb
deleted file mode 100644
index 33f1f905d1..0000000000
--- a/src/mainboard/eaglelion/5bcm/devicetree.cb
+++ /dev/null
@@ -1,52 +0,0 @@
-chip northbridge/amd/gx1
- device domain 0 on
- device pci 0.0 on end
- chip southbridge/amd/cs5530
- device pci 12.0 on
- chip superio/nsc/pc97317
- device pnp 2e.0 on # Keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1
- end
- device pnp 2e.1 on # Mouse
- irq 0x70 = 12
- end
- device pnp 2e.2 on # RTC
- io 0x60 = 0x70
- irq 0x70 = 8
- end
- device pnp 2e.3 off # FDC
- end
- device pnp 2e.4 on # Parallel Port
- io 0x60 = 0x378
- irq 0x70 = 7
- end
- device pnp 2e.5 on # COM2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.6 on # COM1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.7 on # GPIO
- io 0x60 = 0xe0
- end
- device pnp 2e.8 on # Power Management
- io 0x60 = 0xe800
- end
- end
- device pci 12.1 off end # SMI
- device pci 12.2 on end # IDE
- device pci 12.3 off end # Audio
- device pci 12.4 off end # VGA
- end
- end
- end
-
- chip cpu/amd/geode_gx1
- end
-
-end
-
diff --git a/src/mainboard/eaglelion/5bcm/irq_tables.c b/src/mainboard/eaglelion/5bcm/irq_tables.c
deleted file mode 100644
index 95f67bc7e1..0000000000
--- a/src/mainboard/eaglelion/5bcm/irq_tables.c
+++ /dev/null
@@ -1,31 +0,0 @@
-/* This file was generated by getpir.c, do not modify!
- (but if you do, please run checkpir on it to verify)
- * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up
- *
- * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
-*/
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
- PIRQ_SIGNATURE, /* u32 signature */
- PIRQ_VERSION, /* u16 version */
- 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
- 0x00, /* Where the interrupt router lies (bus) */
- (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
- 0x800, /* IRQs devoted exclusively to PCI usage */
- 0x1078, /* Vendor */
- 0x2, /* Device */
- 0, /* Miniport data */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0xdf, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
- {
- /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
- {0x00,(0x0e<<3)|0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0x0deb8}}, 0x1, 0x0},
- {0x00,(0x0f<<3)|0x0, {{0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0xdeb8}, {0x02, 0x0deb8}}, 0x2, 0x0},
- }
-};
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/eaglelion/5bcm/romstage.c b/src/mainboard/eaglelion/5bcm/romstage.c
deleted file mode 100644
index f2476106c4..0000000000
--- a/src/mainboard/eaglelion/5bcm/romstage.c
+++ /dev/null
@@ -1,22 +0,0 @@
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <stdlib.h>
-#include <console/console.h>
-#include "superio/nsc/pc97317/early_serial.c"
-#include "cpu/x86/bist.h"
-#include "southbridge/amd/cs5530/enable_rom.c"
-#include "northbridge/amd/gx1/raminit.c"
-
-#define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1)
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
- pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
- report_bist_failure(bist);
- cs5530_enable_rom();
- sdram_init();
-}
diff --git a/src/mainboard/eaglelion/Kconfig b/src/mainboard/eaglelion/Kconfig
deleted file mode 100644
index 8729c6cd12..0000000000
--- a/src/mainboard/eaglelion/Kconfig
+++ /dev/null
@@ -1,35 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if VENDOR_EAGLELION
-
-choice
- prompt "Mainboard model"
-
-config BOARD_EAGLELION_5BCM
- bool "5BCM"
-
-endchoice
-
-source "src/mainboard/eaglelion/5bcm/Kconfig"
-
-config MAINBOARD_VENDOR
- string
- default "EagleLion"
-
-endif # VENDOR_EAGLELION
diff --git a/src/mainboard/iei/Kconfig b/src/mainboard/iei/Kconfig
index 014626a1e7..d6578de8dc 100644
--- a/src/mainboard/iei/Kconfig
+++ b/src/mainboard/iei/Kconfig
@@ -21,14 +21,8 @@ if VENDOR_IEI
choice
prompt "Mainboard model"
-config BOARD_IEI_JUKI_511P
- bool "JUKI-511P"
-config BOARD_IEI_ROCKY_512
- bool "ROCKY-512"
config BOARD_IEI_KINO_FAM10
bool "Kino-780AM2(Fam10)"
-config BOARD_IEI_NOVA_4899R
- bool "NOVA-4899R"
config BOARD_IEI_PCISA_LX_800_R10
bool "PCISA LX-800-R10"
config BOARD_IEI_PM_LX_800_R11
@@ -38,10 +32,7 @@ config BOARD_IEI_PM_LX2_800_R10
endchoice
-source "src/mainboard/iei/juki-511p/Kconfig"
-source "src/mainboard/iei/rocky-512/Kconfig"
source "src/mainboard/iei/kino-780am2-fam10/Kconfig"
-source "src/mainboard/iei/nova4899r/Kconfig"
source "src/mainboard/iei/pcisa-lx-800-r10/Kconfig"
source "src/mainboard/iei/pm-lx-800-r11/Kconfig"
source "src/mainboard/iei/pm-lx2-800-r10/Kconfig"
diff --git a/src/mainboard/iei/juki-511p/Kconfig b/src/mainboard/iei/juki-511p/Kconfig
deleted file mode 100644
index 0aebb03887..0000000000
--- a/src/mainboard/iei/juki-511p/Kconfig
+++ /dev/null
@@ -1,47 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if BOARD_IEI_JUKI_511P || BOARD_IEI_ROCKY_512
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_AMD_GEODE_GX1
- select NORTHBRIDGE_AMD_GX1
- select SOUTHBRIDGE_AMD_CS5530
- select SUPERIO_WINBOND_W83977F
- select ROMCC
- select PIRQ_ROUTE
- select HAVE_PIRQ_TABLE
- select HAVE_OPTION_TABLE
- select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
- string
- default iei/juki-511p
-
-if BOARD_IEI_JUKI_511P
-config MAINBOARD_PART_NUMBER
- string
- default "JUKI-511P"
-endif # BOARD_IEI_JUKI_511P
-
-config IRQ_SLOT_COUNT
- int
- default 2
-
-endif # BOARD_IEI_JUKI_511P || BOARD_IEI_ROCKY_512
diff --git a/src/mainboard/iei/juki-511p/board_info.txt b/src/mainboard/iei/juki-511p/board_info.txt
deleted file mode 100644
index 3445599893..0000000000
--- a/src/mainboard/iei/juki-511p/board_info.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-Category: half
-Board URL: http://www.ieiworld.com/en/news_content.asp?id=erbium/projectOBJ00150613
diff --git a/src/mainboard/iei/juki-511p/cmos.layout b/src/mainboard/iei/juki-511p/cmos.layout
deleted file mode 100644
index 9050c3db7a..0000000000
--- a/src/mainboard/iei/juki-511p/cmos.layout
+++ /dev/null
@@ -1,72 +0,0 @@
-entries
-
-#start-bit length config config-ID name
-#0 8 r 0 seconds
-#8 8 r 0 alarm_seconds
-#16 8 r 0 minutes
-#24 8 r 0 alarm_minutes
-#32 8 r 0 hours
-#40 8 r 0 alarm_hours
-#48 8 r 0 day_of_week
-#56 8 r 0 day_of_month
-#64 8 r 0 month
-#72 8 r 0 year
-#80 4 r 0 rate_select
-#84 3 r 0 REF_Clock
-#87 1 r 0 UIP
-#88 1 r 0 auto_switch_DST
-#89 1 r 0 24_hour_mode
-#90 1 r 0 binary_values_enable
-#91 1 r 0 square-wave_out_enable
-#92 1 r 0 update_finished_enable
-#93 1 r 0 alarm_interrupt_enable
-#94 1 r 0 periodic_interrupt_enable
-#95 1 r 0 disable_clock_updates
-#96 288 r 0 temporary_filler
-0 384 r 0 reserved_memory
-384 1 e 4 boot_option
-385 1 e 4 last_boot
-386 1 e 1 ECC_memory
-388 4 r 0 reboot_bits
-392 3 e 5 baud_rate
-400 1 e 1 power_on_after_fail
-412 4 e 6 debug_level
-416 4 e 7 boot_first
-420 4 e 7 boot_second
-424 4 e 7 boot_third
-428 4 h 0 boot_index
-432 8 h 0 boot_countdown
-1008 16 h 0 check_sum
-
-enumerations
-
-#ID value text
-1 0 Disable
-1 1 Enable
-2 0 Enable
-2 1 Disable
-4 0 Fallback
-4 1 Normal
-5 0 115200
-5 1 57600
-5 2 38400
-5 3 19200
-5 4 9600
-5 5 4800
-5 6 2400
-5 7 1200
-6 6 Notice
-6 7 Info
-6 8 Debug
-6 9 Spew
-7 0 Network
-7 1 HDD
-7 2 Floppy
-7 8 Fallback_Network
-7 9 Fallback_HDD
-7 10 Fallback_Floppy
-#7 3 ROM
-
-checksums
-
-checksum 392 1007 1008
diff --git a/src/mainboard/iei/juki-511p/devicetree.cb b/src/mainboard/iei/juki-511p/devicetree.cb
deleted file mode 100644
index 4706ff59f6..0000000000
--- a/src/mainboard/iei/juki-511p/devicetree.cb
+++ /dev/null
@@ -1,57 +0,0 @@
-chip northbridge/amd/gx1
- device domain 0 on
- device pci 0.0 on end
- chip southbridge/amd/cs5530
-
- device pci 12.0 on
- chip superio/winbond/w83977f
- device pnp 3f0.0 on # FDC
- irq 0x70 = 6
- end
- device pnp 3f0.1 on # Parallel port
- io 0x60 = 0x378
- irq 0x70 = 7
- end
- device pnp 3f0.2 on # COM1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 3f0.3 on # COM2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 3f0.4 on # RTC
- io 0x60 = 0x070
- irq 0x70 = 8
- end
- device pnp 3f0.5 on # Keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1 # Int 1 for PS/2 keyboard
- irq 0x72 = 12 # Int 12 for PS/2 mouse
- end
- device pnp 3f0.6 off # IR
- end
- device pnp 3f0.7 off # GPIO1
- end
- device pnp 3f0.8 off # GPIO
- end
- end
- device pci 12.1 on end # SMI
- device pci 12.2 on end # IDE
- device pci 12.3 on end # Audio
- device pci 12.4 on end # VGA onboard
-
- end
-
- device pci 0e.0 on end # ETH0
- device pci 13.0 on end # USB
-
- end
- end
-
- chip cpu/amd/geode_gx1
- end
-
-end
-
diff --git a/src/mainboard/iei/juki-511p/irq_tables.c b/src/mainboard/iei/juki-511p/irq_tables.c
deleted file mode 100644
index 7d8e800f3a..0000000000
--- a/src/mainboard/iei/juki-511p/irq_tables.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <arch/pirq_routing.h>
-
-#define IRQ_BITMAP_LINK0 0x0800 /* chipset's INTA# input should be routed to IRQ11 */
-#define IRQ_BITMAP_LINK1 0x0400 /* chipset's INTB# input should be routed to IRQ10 */
-#define IRQ_BITMAP_LINK2 0x0000 /* chipset's INTC# input should be routed to nothing (disabled) */
-#define IRQ_BITMAP_LINK3 0x0000 /* chipset's INTD# input should be routed to nothing (disabled) */
-
-static const struct irq_routing_table intel_irq_routing_table = {
- PIRQ_SIGNATURE, /* u32 signature */
- PIRQ_VERSION, /* u16 version */
- 32+16*CONFIG_IRQ_SLOT_COUNT, /* There can be a total of CONFIG_IRQ_SLOT_COUNT devices on the bus */
- 0x00, /* Where the interrupt router lies (bus) */
- (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
- 0xc00, /* IRQs devoted exclusively to PCI usage */
- 0x1078, /* Vendor */
- 0x2, /* Device */
- 0, /* Miniport data */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0x57, /* u8 checksum. This has to be set to some
- value that would give 0 after the sum of all
- bytes for this structure (including checksum) */
-
- .slots = {
- [0] = {
- .slot = 0x0, /* should be 0 when it is no real slot. My device is soldered */
- .bus = 0x00,
- .devfn = (0x13<<3)|0x0, /* 0x13 is my USB OHCI */
- .irq = {
- [0] = { /* <-- 0 means this is INTA# output from the device or slot */
- .link = 0x01, /* 0x01 means its connected to INTA# input at chipset */
- .bitmap = IRQ_BITMAP_LINK0
- },
- [1] = { /* <-- 1 means this is INTB# output from the device or slot */
- .link = 0x02, /* 0x02 means its connected to INTB# input at chipset */
- .bitmap = IRQ_BITMAP_LINK1
- },
- [2] = { /* <-- 2 means this is INTC# output from the device or slot */
- .link = 0x03, /* 0x03 means its connected to INTC# input at chipset */
- .bitmap = IRQ_BITMAP_LINK2
- },
- [3] = { /* <-- 3 means this is INTD# output from the device or slot */
- .link = 0x04, /* 0x04 means its connected to INTD# input at chipset */
- .bitmap = IRQ_BITMAP_LINK3
- }
- }
- },
-
- [1] = {
- .slot = 0x0, /* means also "on board" */
- .bus = 0x00,
- .devfn = (0x0e<<3)|0x0, /* 0x0e is my Realtek Network device */
- .irq = {
- [0] = { /* <-- 0 means this is INTA# output from the device or slot */
- .link = 0x02, /* 0x02 means its connected to INTB# input at chipset */
- .bitmap = IRQ_BITMAP_LINK1
- },
- [1] = { /* <-- 1 means this is INTB# output from the device or slot */
- .link = 0x03, /* 0x03 means its connected to INTC# input at chipset */
- .bitmap = IRQ_BITMAP_LINK2
- },
- [2] = { /* <-- 2 means this is INTC# output from the device or slot */
- .link = 0x04, /* 0x04 means its connected to INTD# input at chipset */
- .bitmap = IRQ_BITMAP_LINK3
- },
- [3] = { /* <-- 3 means this is INTD# output from the device or slot */
- .link = 0x01, /* 0x01 means its connected to INTA# input at chipset */
- .bitmap = IRQ_BITMAP_LINK0
- }
- }
- }
- }
-};
-
-/**
- * Copy the IRQ routing table to memory.
- *
- * @param addr Destination address (between 0xF0000...0x100000).
- * @return The end address of the pirq routing table in memory.
- */
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/iei/juki-511p/romstage.c b/src/mainboard/iei/juki-511p/romstage.c
deleted file mode 100644
index a58407a524..0000000000
--- a/src/mainboard/iei/juki-511p/romstage.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include "superio/winbond/w83977f/early_serial.c"
-#include "southbridge/amd/cs5530/enable_rom.c"
-#include "cpu/x86/bist.h"
-#include "drivers/pc80/udelay_io.c"
-#include "northbridge/amd/gx1/raminit.c"
-
-#define SERIAL_DEV PNP_DEV(0x3f0, W83977F_SP1)
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
- w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
- report_bist_failure(bist);
-
- /* Disable Watchdog Timer. */
- inb(0x043);
- inb(0x843);
-
- cs5530_enable_rom();
- sdram_init();
-}
diff --git a/src/mainboard/iei/nova4899r/Kconfig b/src/mainboard/iei/nova4899r/Kconfig
deleted file mode 100644
index 8d0a9a4751..0000000000
--- a/src/mainboard/iei/nova4899r/Kconfig
+++ /dev/null
@@ -1,46 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if BOARD_IEI_NOVA_4899R
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_AMD_GEODE_GX1
- select NORTHBRIDGE_AMD_GX1
- select SOUTHBRIDGE_AMD_CS5530
- select SUPERIO_WINBOND_W83977TF
- select ROMCC
- select HAVE_PIRQ_TABLE
- select PIRQ_ROUTE
- select HAVE_OPTION_TABLE
- select UDELAY_TSC
- select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
- string
- default iei/nova4899r
-
-config MAINBOARD_PART_NUMBER
- string
- default "NOVA-4899R"
-
-config IRQ_SLOT_COUNT
- int
- default 5
-
-endif # BOARD_IEI_NOVA_4899R
diff --git a/src/mainboard/iei/nova4899r/board_info.txt b/src/mainboard/iei/nova4899r/board_info.txt
deleted file mode 100644
index 6ffdfbed8e..0000000000
--- a/src/mainboard/iei/nova4899r/board_info.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-Category: half
-Board URL: http://www.icpamerica.com/products/single_board_computers/5_25_NOVA/NOVA-4899.html
diff --git a/src/mainboard/iei/nova4899r/cmos.layout b/src/mainboard/iei/nova4899r/cmos.layout
deleted file mode 100644
index 9050c3db7a..0000000000
--- a/src/mainboard/iei/nova4899r/cmos.layout
+++ /dev/null
@@ -1,72 +0,0 @@
-entries
-
-#start-bit length config config-ID name
-#0 8 r 0 seconds
-#8 8 r 0 alarm_seconds
-#16 8 r 0 minutes
-#24 8 r 0 alarm_minutes
-#32 8 r 0 hours
-#40 8 r 0 alarm_hours
-#48 8 r 0 day_of_week
-#56 8 r 0 day_of_month
-#64 8 r 0 month
-#72 8 r 0 year
-#80 4 r 0 rate_select
-#84 3 r 0 REF_Clock
-#87 1 r 0 UIP
-#88 1 r 0 auto_switch_DST
-#89 1 r 0 24_hour_mode
-#90 1 r 0 binary_values_enable
-#91 1 r 0 square-wave_out_enable
-#92 1 r 0 update_finished_enable
-#93 1 r 0 alarm_interrupt_enable
-#94 1 r 0 periodic_interrupt_enable
-#95 1 r 0 disable_clock_updates
-#96 288 r 0 temporary_filler
-0 384 r 0 reserved_memory
-384 1 e 4 boot_option
-385 1 e 4 last_boot
-386 1 e 1 ECC_memory
-388 4 r 0 reboot_bits
-392 3 e 5 baud_rate
-400 1 e 1 power_on_after_fail
-412 4 e 6 debug_level
-416 4 e 7 boot_first
-420 4 e 7 boot_second
-424 4 e 7 boot_third
-428 4 h 0 boot_index
-432 8 h 0 boot_countdown
-1008 16 h 0 check_sum
-
-enumerations
-
-#ID value text
-1 0 Disable
-1 1 Enable
-2 0 Enable
-2 1 Disable
-4 0 Fallback
-4 1 Normal
-5 0 115200
-5 1 57600
-5 2 38400
-5 3 19200
-5 4 9600
-5 5 4800
-5 6 2400
-5 7 1200
-6 6 Notice
-6 7 Info
-6 8 Debug
-6 9 Spew
-7 0 Network
-7 1 HDD
-7 2 Floppy
-7 8 Fallback_Network
-7 9 Fallback_HDD
-7 10 Fallback_Floppy
-#7 3 ROM
-
-checksums
-
-checksum 392 1007 1008
diff --git a/src/mainboard/iei/nova4899r/devicetree.cb b/src/mainboard/iei/nova4899r/devicetree.cb
deleted file mode 100644
index f27662eb6f..0000000000
--- a/src/mainboard/iei/nova4899r/devicetree.cb
+++ /dev/null
@@ -1,64 +0,0 @@
-chip northbridge/amd/gx1
- device domain 0 on
- device pci 0.0 on end
- chip southbridge/amd/cs5530
- device pci 0a.0 on end # ETH0
- device pci 0b.0 off end # ETH1
- device pci 0c.0 on end # ETH2
- device pci 0f.0 on end # PCI slot
- device pci 12.0 on
- chip superio/winbond/w83977tf
- device pnp 2e.0 on # FDC
- irq 0x70 = 6
- end
- device pnp 2e.1 on # Parallel Port
- io 0x60 = 0x378
- irq 0x70 = 7
- end
- device pnp 2e.2 on # COM1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.3 on # COM2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.4 off # Reserved
- end
- device pnp 2e.5 on # Keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 0x01 # Int 1 for PS/2 keyboard
- irq 0x72 = 0x0c # Int 12 for PS/2 mouse
- end
- device pnp 2e.6 on # IR
- io 0x60 = 0x2e8
- irq 0x70 = 3
- end
- device pnp 2e.7 on # GAME/MIDI/GPIO1
- io 0x60 = 0x290
- end
- device pnp 2e.8 on # GPIO2
- io 0x60 = 0x110
- end
- device pnp 2e.9 on # GPIO3
- io 0x60 = 0x120
- end
- device pnp 2e.A on # Power Management
- io 0x60 = 0xe800
- end
- end
- device pci 12.1 on end # SMI
- device pci 12.2 on end # IDE
- device pci 12.3 on end # Audio
- device pci 12.4 on end # VGA onboard
- end
- device pci 13.0 on end # USB
- end
- end
-
- chip cpu/amd/geode_gx1
- end
-
-end
-
diff --git a/src/mainboard/iei/nova4899r/irq_tables.c b/src/mainboard/iei/nova4899r/irq_tables.c
deleted file mode 100644
index 785e0f3059..0000000000
--- a/src/mainboard/iei/nova4899r/irq_tables.c
+++ /dev/null
@@ -1,214 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Luis Correia <luis.f.correia@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <arch/pirq_routing.h>
-
-/*
- * IRQ 5530 USB Network Network Network free
- * controller northbridge device device#0 device#1 device#2 slot
- * 00.13.0 00.0a.00 00.0b.00 00.0c.00 00.0f.00
- * ------------------------------------------------------------------------
- * 14 INTA# INTA# n.c. n.c. n.c. INTA#
- * 5 INTB# n.c. n.c. n.c. INTA# n.c.
- * 10 INTC# n.c. n.c. INTA# n.c. n.c.
- * 11 INTD# n.c. INTA# n.c. n.c. n.c.
- */
-
-/*
- * - the USB controller should be connected to IRQ14
- * - the network controller #0 should be connected to IRQ11
- * - the network controller #1 should be connected to IRQ10
- * - the network controller #2 should be connected to IRQ5
- * - the additional PCI slot must share the IRQ with the internal USB
- */
-
-/* Bit 9 means IRQ 9 is available for this cs5530 INT input. */
-#define IRQ_BITMAP_LINK0 0x0200
-/* Bit 5 means IRQ 5 is available for this cs5530 INT input. */
-#define IRQ_BITMAP_LINK1 0x0020
-/* Bit 10 means IRQ10 is available for this cs5530 INT input. */
-#define IRQ_BITMAP_LINK2 0x0400
-/* Bit 11 means IRQ11 is available for this cs5530 INT input. */
-#define IRQ_BITMAP_LINK3 0x0800
-
-static const struct irq_routing_table intel_irq_routing_table = {
- .signature = PIRQ_SIGNATURE, /* u32 signature */
- .version = PIRQ_VERSION, /* u16 version */
- .size = 32+16*CONFIG_IRQ_SLOT_COUNT, /* There can be total 4 devices on the bus */
- .rtr_bus = 0x00, /* Where the interrupt router lies (bus) */
- .rtr_devfn = (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
- .exclusive_irqs = 0x4C20, /* IRQs devoted exclusively to PCI usage */
- .rtr_vendor = 0x1078, /* Vendor */
- .rtr_device = 0x0100, /* Device */
- .miniport_data = 0, /* Miniport data */
- .checksum = 0xBF+16, /* TODO! calculate correct sum ! */
-/*
- * Definition for "slot#0". There is no real slot,
- * the network device is soldered...
- */
- .slots = {
- [0] = {
- .bus = 0x00,
- .devfn = (0x0a<<3)|0x0,
- .irq = {
- [0] = {
- .link = 0x03, /* INT C */
- .bitmap = IRQ_BITMAP_LINK2
- },
- [1] = {
- .link = 0x02, /* INT B */
- .bitmap = IRQ_BITMAP_LINK1
- },
- [2] = { /* = device INTA output */
- .link = 0x01, /* INT A */
- .bitmap = IRQ_BITMAP_LINK0
- },
- [3] = {
- .link = 0x04, /* = cs5530 INT D input */
- .bitmap = IRQ_BITMAP_LINK3
- }
- },
- .slot = 0x3, /* soldered */
- },
-/*
- * Definition for "slot#1". There is no real slot,
- * the network device is soldered...
- *
- * Configuration is ommited on purpose in the attempt of solving the
- * issue with IRQ panics (this is device is actually eth1).
-
- [1] = {
- .bus = 0x00,
- .devfn = (0x0b<<3)|0x0,
- .irq = {
- [0] = {
- .link = 0x04,
- .bitmap = IRQ_BITMAP_LINK3
- },
- [1] = {
- .link = 0x03,
- .bitmap = IRQ_BITMAP_LINK2
- },
- [2] = {
- .link = 0x02,
- .bitmap = IRQ_BITMAP_LINK1
- },
- [3] = {
- .link = 0x01,
- .bitmap = IRQ_BITMAP_LINK0
- }
- },
- .slot = 0x2,
- },
- */
-
-/*
- * Definition for "slot#2". There is no real slot,
- * the network device is soldered...
- */
- [2] = {
- .bus = 0x00,
- .devfn = (0x0c<<3)|0x0,
- .irq = {
- [0] = {
- .link = 0x01, /* INT A */
- .bitmap = IRQ_BITMAP_LINK0
- },
- [1] = {
- .link = 0x04, /* INT D */
- .bitmap = IRQ_BITMAP_LINK3
- },
- [2] = { /* = device INTA output */
- .link = 0x03, /* INT C */
- .bitmap = IRQ_BITMAP_LINK2
- },
- [3] = {
- .link = 0x02, /* = cs5530 INT B input */
- .bitmap = IRQ_BITMAP_LINK1
- }
- },
- .slot = 0x1, /* soldered */
- },
-/*
- * This is a free PCI slot.
- */
- [3] = {
- .bus = 0x00,
- .devfn = (0x0f<<3)|0x0,
- .irq = {
- [0] = { /* = device INTA output */
- .link = 0x04, /* INT D */
- .bitmap = IRQ_BITMAP_LINK3
- },
- [1] = {
- .link = 0x03, /* = cs5530 INT C input */
- .bitmap = IRQ_BITMAP_LINK2
- },
- [2] = {
- .link = 0x02, /* INT B */
- .bitmap = IRQ_BITMAP_LINK1
- },
- [3] = {
- .link = 0x01, /* INT A */
- .bitmap = IRQ_BITMAP_LINK0
- }
- },
- .slot = 0x6, /* FIXME: should be not 0, as it defines a real slot */
- },
-/*
- * Definition for "slot#3". There is no real slot,
- * the USB device is embedded...
- */
- [4] = {
- .bus = 0x00,
- .devfn = (0x13<<3)|0x0,
- .irq = {
- [0] = {
- .link = 0x02, /* INT B */
- .bitmap = IRQ_BITMAP_LINK1
- },
- [1] = {
- .link = 0x01, /* INT A */
- .bitmap = IRQ_BITMAP_LINK0
- },
- [2] = {
- .link = 0x04, /* INT D */
- .bitmap = IRQ_BITMAP_LINK3
- },
- [3] = {
- .link = 0x03, /* INT C */
- .bitmap = IRQ_BITMAP_LINK2
- }
- },
- .slot = 0x5, /* chip internal */
- }
- }
-};
-
-/**
- * Copy the IRQ routing table to memory.
- *
- * @param addr Destination address (between 0xF0000...0x100000).
- * @return The end address of the pirq routing table in memory.
- **/
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/iei/nova4899r/romstage.c b/src/mainboard/iei/nova4899r/romstage.c
deleted file mode 100644
index a146d8e1f7..0000000000
--- a/src/mainboard/iei/nova4899r/romstage.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Luis Correia <luis.f.correia@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include "superio/winbond/w83977tf/early_serial.c"
-#include "southbridge/amd/cs5530/enable_rom.c"
-#include "cpu/x86/bist.h"
-
-#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-
-#include "northbridge/amd/gx1/raminit.c"
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
- w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
- report_bist_failure(bist);
- cs5530_enable_rom();
- sdram_init();
-}
diff --git a/src/mainboard/iei/rocky-512/Kconfig b/src/mainboard/iei/rocky-512/Kconfig
deleted file mode 100644
index 864da867d7..0000000000
--- a/src/mainboard/iei/rocky-512/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if BOARD_IEI_ROCKY_512
-
-# Dummy for abuild
-
-config MAINBOARD_PART_NUMBER
- string
- default "ROCKY-512"
-
-endif
diff --git a/src/mainboard/iei/rocky-512/board_info.txt b/src/mainboard/iei/rocky-512/board_info.txt
deleted file mode 100644
index 604bccf468..0000000000
--- a/src/mainboard/iei/rocky-512/board_info.txt
+++ /dev/null
@@ -1,3 +0,0 @@
-Category: half
-Board URL: http://www.ieiworld.com/en/product_IPC.asp?model=ROCKY-512
-Clone of: iei/juki-511p
diff --git a/src/mainboard/televideo/Kconfig b/src/mainboard/televideo/Kconfig
deleted file mode 100644
index aa2f5a1e73..0000000000
--- a/src/mainboard/televideo/Kconfig
+++ /dev/null
@@ -1,35 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if VENDOR_TELEVIDEO
-
-choice
- prompt "Mainboard model"
-
-config BOARD_TELEVIDEO_TC7020
- bool "TC7020"
-
-endchoice
-
-source "src/mainboard/televideo/tc7020/Kconfig"
-
-config MAINBOARD_VENDOR
- string
- default "TeleVideo"
-
-endif # VENDOR_TELEVIDEO
diff --git a/src/mainboard/televideo/tc7020/Kconfig b/src/mainboard/televideo/tc7020/Kconfig
deleted file mode 100644
index 6d77f5901f..0000000000
--- a/src/mainboard/televideo/tc7020/Kconfig
+++ /dev/null
@@ -1,45 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if BOARD_TELEVIDEO_TC7020
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_AMD_GEODE_GX1
- select NORTHBRIDGE_AMD_GX1
- select SOUTHBRIDGE_AMD_CS5530
- select SUPERIO_NSC_PC97317
- select ROMCC
- select HAVE_PIRQ_TABLE
- select PIRQ_ROUTE
- select UDELAY_TSC
- select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
- string
- default televideo/tc7020
-
-config MAINBOARD_PART_NUMBER
- string
- default "TC7020"
-
-config IRQ_SLOT_COUNT
- int
- default 3
-
-endif # BOARD_TELEVIDEO_TC7020
diff --git a/src/mainboard/televideo/tc7020/board_info.txt b/src/mainboard/televideo/tc7020/board_info.txt
deleted file mode 100644
index 93e6c5c6bf..0000000000
--- a/src/mainboard/televideo/tc7020/board_info.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-Category: settop
-Board URL: http://www.televideo.com/TeleVideo/TC7000_WinCE_Series.htm
diff --git a/src/mainboard/televideo/tc7020/devicetree.cb b/src/mainboard/televideo/tc7020/devicetree.cb
deleted file mode 100644
index d1fa6bd271..0000000000
--- a/src/mainboard/televideo/tc7020/devicetree.cb
+++ /dev/null
@@ -1,57 +0,0 @@
-chip northbridge/amd/gx1 # Northbridge
- device domain 0 on # PCI domain
- device pci 0.0 on end # Host bridge
- chip southbridge/amd/cs5530 # Southbridge
- device pci 12.0 on # ISA bridge
- chip superio/nsc/pc97317 # Super I/O
- device pnp 2e.0 on # PS/2 keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1
- end
- device pnp 2e.1 on # PS/2 mouse
- irq 0x70 = 12
- end
- device pnp 2e.2 on # RTC, Advanced power control (APC)
- io 0x60 = 0x70
- irq 0x70 = 8
- end
- device pnp 2e.3 off # Floppy (N/A on this board)
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 2e.4 on # Parallel port
- io 0x60 = 0x378
- irq 0x70 = 7
- end
- device pnp 2e.5 on # COM2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.6 on # COM1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.7 on # GPIO
- io 0x60 = 0xe0
- end
- device pnp 2e.8 on # Power management
- io 0x60 = 0xe8
- end
- end
- end
- device pci 12.1 off end # SMI
- device pci 12.2 on end # IDE
- device pci 12.3 on end # Audio
- device pci 12.4 on end # VGA (onboard)
- device pci 13.0 on end # USB
- device pci 14.0 on end # MiniPCI slot
- device pci 15.0 on end # Ethernet (onboard)
- register "ide0_enable" = "1"
- register "ide1_enable" = "0" # Not available/needed on this board
- end
- end
- chip cpu/amd/geode_gx1 # CPU
- end
-end
diff --git a/src/mainboard/televideo/tc7020/irq_tables.c b/src/mainboard/televideo/tc7020/irq_tables.c
deleted file mode 100644
index 5eef0c01e2..0000000000
--- a/src/mainboard/televideo/tc7020/irq_tables.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com>
- * Copyright (C) 2007 Kenji Noguchi <tokyo246@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <arch/pirq_routing.h>
-#include <console/console.h>
-#include <device/pci.h>
-
-/* Platform IRQs */
-#define PIRQA 11
-#define PIRQB 10
-#define PIRQC 9
-#define PIRQD 12
-
-/* Link */
-#define LINK_PIRQA 1
-#define LINK_PIRQB 2
-#define LINK_PIRQC 3
-#define LINK_PIRQD 4
-#define LINK_NONE 0
-
-/* Map */
-#define IRQ_BITMAP_LINKA (1 << PIRQA)
-#define IRQ_BITMAP_LINKB (1 << PIRQB)
-#define IRQ_BITMAP_LINKC (1 << PIRQC)
-#define IRQ_BITMAP_LINKD (1 << PIRQD)
-#define IRQ_BITMAP_NOLINK 0x0
-
-#define EXCLUSIVE_PCI_IRQS (IRQ_BITMAP_LINKA | IRQ_BITMAP_LINKB | IRQ_BITMAP_LINKC | IRQ_BITMAP_LINKD)
-
-static const struct irq_routing_table intel_irq_routing_table = {
- PIRQ_SIGNATURE, /* u32 signature */
- PIRQ_VERSION, /* u16 version */
- 32+16*CONFIG_IRQ_SLOT_COUNT, /* There can be a total of CONFIG_IRQ_SLOT_COUNT devices on the bus */
- 0x00, /* Where the interrupt router lies (bus) */
- (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */
- EXCLUSIVE_PCI_IRQS, /* IRQs devoted exclusively to PCI usage */
- 0x1078, /* Vendor */
- 0x1, /* Device */
- 0, /* Miniport data */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0x60, /* u8 checksum. This has to be set to some
- value that would give 0 after the sum of all
- bytes for this structure (including checksum) */
-
- .slots = {
- [0] = {
- .slot = 0x0, /* means also "on board" */
- .bus = 0x00,
- .devfn = (0x13<<3)|0x0, /* 0x13 is USB OHCI */
- .irq = {
- [0] = { /* <-- 0 means this is INTA# output from the device or slot */
- .link = LINK_PIRQA,
- .bitmap = IRQ_BITMAP_LINKA
- },
- [1] = { /* <-- 1 means this is INTB# output from the device or slot */
- .link = LINK_NONE,
- .bitmap = IRQ_BITMAP_NOLINK
- },
- [2] = { /* <-- 2 means this is INTC# output from the device or slot */
- .link = LINK_NONE,
- .bitmap = IRQ_BITMAP_NOLINK
- },
- [3] = { /* <-- 3 means this is INTD# output from the device or slot */
- .link = LINK_NONE,
- .bitmap = IRQ_BITMAP_NOLINK
- }
- }
- },
-
- [1] = {
- .slot = 0x0, /* means also "on board" */
- .bus = 0x00,
- .devfn = (0x15<<3)|0x0, /* 0x15 is NSC Network device */
- .irq = {
- [0] = { /* <-- 0 means this is INTA# output from the device or slot */
- .link = LINK_PIRQB,
- .bitmap = IRQ_BITMAP_LINKB
- },
- [1] = { /* <-- 1 means this is INTB# output from the device or slot */
- .link = LINK_NONE,
- .bitmap = IRQ_BITMAP_NOLINK
- },
- [2] = { /* <-- 2 means this is INTC# output from the device or slot */
- .link = LINK_NONE,
- .bitmap = IRQ_BITMAP_NOLINK
- },
- [3] = { /* <-- 3 means this is INTD# output from the device or slot */
- .link = LINK_NONE,
- .bitmap = IRQ_BITMAP_NOLINK
- }
- }
- },
-
- [2] = {
- .slot = 0x1, /* This is a Mini PCI slot */
- .bus = 0x00,
- .devfn = (0x14<<3)|0x0,
- .irq = {
- [0] = { /* <-- 0 means this is INTA# output from the device or slot */
- .link = LINK_PIRQC,
- .bitmap = IRQ_BITMAP_LINKC
- },
- [1] = { /* <-- 1 means this is INTB# output from the device or slot */
- /* NEEDSWORK: not confirmed. No device to test which uses both INTA and INTB */
- .link = LINK_PIRQD,
- .bitmap = IRQ_BITMAP_LINKD
- },
- [2] = { /* No INTC# for Mini PCI */
- .link = LINK_NONE,
- .bitmap = IRQ_BITMAP_NOLINK
- },
- [3] = { /* No INTD# for Mini PCI */
- .link = LINK_NONE,
- .bitmap = IRQ_BITMAP_NOLINK
- }
- }
- },
- }
-};
-
-/**
- * Copy the IRQ routing table to memory.
- *
- * @param addr Destination address (between 0xF0000...0x100000).
- * @return The end address of the pirq routing table in memory.
- */
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/televideo/tc7020/romstage.c b/src/mainboard/televideo/tc7020/romstage.c
deleted file mode 100644
index 158a45fbde..0000000000
--- a/src/mainboard/televideo/tc7020/romstage.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include "northbridge/amd/gx1/raminit.c"
-#include "superio/nsc/pc97317/early_serial.c"
-#include "cpu/x86/bist.h"
-#include "southbridge/amd/cs5530/enable_rom.c"
-
-#define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1)
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
- pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
- report_bist_failure(bist);
- cs5530_enable_rom();
- sdram_init();
-}