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authorKane Chen <kane_chen@pegatron.corp-partner.google.com>2019-11-27 16:47:55 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-12-02 12:07:17 +0000
commitb7f30ad25f8803e8e88963550b7ff4eb0d86dcdb (patch)
tree760c7ff6b22d0a693812eccefc84b8cb8d859bfa /src/mainboard
parentbd36ea9866372e29ebf7c5bfd2c44dcef6c6e485 (diff)
downloadcoreboot-b7f30ad25f8803e8e88963550b7ff4eb0d86dcdb.tar.xz
mb/google/hatch/variants/helios: DPTF solution update
Modify DPTF parameters. BUG=b:131272830 BRANCH=firmware-hatch-12672.B TEST=emerge-hatch coreboot chromeos-bootimage Signed-off-by: Kane Chen <kane_chen@pegatron.corp-partner.google.com> Change-Id: I93930525edf4c5efb6b73bdfc8f16950754f7c9a Reviewed-on: https://review.coreboot.org/c/coreboot/+/37272 Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl22
1 files changed, 8 insertions, 14 deletions
diff --git a/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl
index 20a61d7df4..a359284680 100644
--- a/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl
+++ b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl
@@ -18,16 +18,16 @@
#define DPTF_TSR0_SENSOR_ID 0
#define DPTF_TSR0_SENSOR_NAME "Battery Charger"
-#define DPTF_TSR0_PASSIVE 50
+#define DPTF_TSR0_PASSIVE 59
#define DPTF_TSR0_CRITICAL 80
#define DPTF_TSR1_SENSOR_ID 1
#define DPTF_TSR1_SENSOR_NAME "5V Regulator"
#define DPTF_TSR1_PASSIVE 0
#define DPTF_TSR1_CRITICAL 70
-#define DPTF_TSR1_ACTIVE_AC0 43
-#define DPTF_TSR1_ACTIVE_AC1 40
-#define DPTF_TSR1_ACTIVE_AC2 38
+#define DPTF_TSR1_ACTIVE_AC0 42
+#define DPTF_TSR1_ACTIVE_AC1 41
+#define DPTF_TSR1_ACTIVE_AC2 39
#define DPTF_TSR2_SENSOR_ID 2
#define DPTF_TSR2_SENSOR_NAME "Ambient"
@@ -36,14 +36,8 @@
#define DPTF_TSR3_SENSOR_ID 3
#define DPTF_TSR3_SENSOR_NAME "CPU"
-#define DPTF_TSR3_PASSIVE 90
-#define DPTF_TSR3_CRITICAL 105
-#define DPTF_TSR3_ACTIVE_AC0 87
-#define DPTF_TSR3_ACTIVE_AC1 85
-#define DPTF_TSR3_ACTIVE_AC2 83
-#define DPTF_TSR3_ACTIVE_AC3 80
-#define DPTF_TSR3_ACTIVE_AC4 78
-#define DPTF_TSR3_ACTIVE_AC5 75
+#define DPTF_TSR3_PASSIVE 44
+#define DPTF_TSR3_CRITICAL 90
#define DPTF_ENABLE_CHARGER
#define DPTF_ENABLE_FAN_CONTROL
@@ -91,7 +85,7 @@ Name (DART, Package () {
0, 0, 0
},
Package () {
- \_SB.DPTF.TFN1, \_SB.DPTF.TSR1, 100, 100, 80, 60, 0, 0, 0, 0,
+ \_SB.DPTF.TFN1, \_SB.DPTF.TSR1, 100, 90, 70, 50, 0, 0, 0, 0,
0, 0, 0
},
Package () {
@@ -99,7 +93,7 @@ Name (DART, Package () {
0, 0, 0
},
Package () {
- \_SB.DPTF.TFN1, \_SB.DPTF.TSR3, 100, 90, 69, 56, 46, 36, 30, 0,
+ \_SB.DPTF.TFN1, \_SB.DPTF.TSR3, 100, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0
}
})