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authorPatrick Rudolph <patrick.rudolph@9elements.com>2018-06-28 14:10:27 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-07-30 18:58:49 +0000
commitbaea5994d84252c397a2a991655f7aa9a803e927 (patch)
tree0054c698d02861eca366d76f28ce60bc3fce6c55 /src/mainboard
parent2dc63895eb9250137c216ced33fb63fc91e0402a (diff)
downloadcoreboot-baea5994d84252c397a2a991655f7aa9a803e927.tar.xz
mb/google/link: Use new PMBASE API
Change-Id: If4d6c80e95469341f0c978f302f04508f50280bd Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/27284 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/link/mainboard_smi.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/src/mainboard/google/link/mainboard_smi.c b/src/mainboard/google/link/mainboard_smi.c
index 0babb54636..0bd164e959 100644
--- a/src/mainboard/google/link/mainboard_smi.c
+++ b/src/mainboard/google/link/mainboard_smi.c
@@ -20,6 +20,7 @@
#include <southbridge/intel/bd82x6x/nvs.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/bd82x6x/me.h>
+#include <southbridge/intel/common/pmbase.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <cpu/intel/model_206ax/model_206ax.h>
#include <elog.h>
@@ -31,7 +32,6 @@
static u8 mainboard_smi_ec(void)
{
u8 cmd = google_chromeec_get_event();
- u32 pm1_cnt;
#if IS_ENABLED(CONFIG_ELOG_GSMI)
/* Log this event */
@@ -44,9 +44,7 @@ static u8 mainboard_smi_ec(void)
printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
/* Go to S5 */
- pm1_cnt = inl(smm_get_pmbase() + PM1_CNT);
- pm1_cnt |= (0xf << 10);
- outl(pm1_cnt, smm_get_pmbase() + PM1_CNT);
+ write_pmbase32(PM1_CNT, read_pmbase32(PM1_CNT) | (0xf << 10));
break;
}