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authorVladimir Serbinenko <phcoder@gmail.com>2014-01-11 05:48:17 +0100
committerVladimir Serbinenko <phcoder@gmail.com>2014-01-23 19:40:37 +0100
commitcc16ffc7cb96a3d36813bc83f5e343003ea30fc5 (patch)
tree23434535295e00172ca4d1d16488e895c99adc64 /src/mainboard
parent24356dd5c1edc64eeea4f1f15806ffb53a86911f (diff)
downloadcoreboot-cc16ffc7cb96a3d36813bc83f5e343003ea30fc5.tar.xz
X201: Add missing LPC registers
Without them PMH7 is inaccessible from running system. Change-Id: Ib5a524325040e253a9d914906f90263fc208c313 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4655 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/lenovo/x201/devicetree.cb4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb
index 20432f6e66..f45fadfc8b 100644
--- a/src/mainboard/lenovo/x201/devicetree.cb
+++ b/src/mainboard/lenovo/x201/devicetree.cb
@@ -109,6 +109,10 @@ chip northbridge/intel/nehalem
register "gpe0_en" = "0x20022046"
register "alt_gp_smi_en" = "0x0000"
+ register "gen1_dec" = "0x7c1601"
+ register "gen2_dec" = "0x0c15e1"
+ register "gen3_dec" = "0x1c1681"
+ register "gen4_dec" = "0x040069"
device pci 16.2 on # IDE/SATA
subsystemid 0x17aa 0x2161