summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-29 06:15:54 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-30 06:00:18 +0000
commitce51d6d9d1ba9d49d0176f821c639aa2384f5582 (patch)
tree7e10c38f6a939dd8e3975e5aa26532e4bcacdfbd /src/mainboard
parentaeb85d53e90728bf758b08895c7ed5dbf9cf3062 (diff)
downloadcoreboot-ce51d6d9d1ba9d49d0176f821c639aa2384f5582.tar.xz
binaryPI boards: Remove BIST reporting
Can be restored with C environment bootblock. Change-Id: I077d7bf088a0ffc65e9ec0d0b1c239194dc4f4ca Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37347 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/bettong/romstage.c8
-rw-r--r--src/mainboard/amd/db-ft3b-lc/romstage.c5
-rw-r--r--src/mainboard/amd/lamar/romstage.c5
-rw-r--r--src/mainboard/amd/olivehillplus/romstage.c5
-rw-r--r--src/mainboard/bap/ode_e21XX/romstage.c5
-rw-r--r--src/mainboard/pcengines/apu2/romstage.c1
6 files changed, 4 insertions, 25 deletions
diff --git a/src/mainboard/amd/bettong/romstage.c b/src/mainboard/amd/bettong/romstage.c
index 03e6585b9a..c9a257cec5 100644
--- a/src/mainboard/amd/bettong/romstage.c
+++ b/src/mainboard/amd/bettong/romstage.c
@@ -18,10 +18,13 @@
#include <arch/io.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
-#include <cpu/x86/bist.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/pi/hudson/hudson.h>
+/* Mask BIST bit 31. One result of Silicon Observation
+ * report_bist_failure(bist & 0x7FFFFFFF);
+ */
+
static void romstage_main_template(void)
{
u32 val;
@@ -38,9 +41,6 @@ static void romstage_main_template(void)
console_init();
}
- /* Halt if there was a built in self test failure */
- post_code(0x34);
- report_bist_failure(bist & 0x7FFFFFFF); /* Mask bit 31. One result of Silicon Observation */
/* Load MPB */
val = cpuid_eax(1);
diff --git a/src/mainboard/amd/db-ft3b-lc/romstage.c b/src/mainboard/amd/db-ft3b-lc/romstage.c
index 2979cf4ae4..475431e419 100644
--- a/src/mainboard/amd/db-ft3b-lc/romstage.c
+++ b/src/mainboard/amd/db-ft3b-lc/romstage.c
@@ -20,7 +20,6 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include <cpu/x86/bist.h>
#include <southbridge/amd/pi/hudson/hudson.h>
static void romstage_main_template(void)
@@ -47,10 +46,6 @@ static void romstage_main_template(void)
console_init();
}
- /* Halt if there was a built in self test failure */
- post_code(0x34);
- report_bist_failure(bist);
-
/* Load MPB */
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
diff --git a/src/mainboard/amd/lamar/romstage.c b/src/mainboard/amd/lamar/romstage.c
index 67485f4f11..4dde4e2e3f 100644
--- a/src/mainboard/amd/lamar/romstage.c
+++ b/src/mainboard/amd/lamar/romstage.c
@@ -20,7 +20,6 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include <cpu/x86/bist.h>
#include <southbridge/amd/common/amd_defs.h>
#include <southbridge/amd/pi/hudson/hudson.h>
#include <superio/fintek/f81216h/f81216h.h>
@@ -58,10 +57,6 @@ static void romstage_main_template(void)
console_init();
}
- /* Halt if there was a built in self test failure */
- post_code(0x34);
- report_bist_failure(bist);
-
/* Load MPB */
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
diff --git a/src/mainboard/amd/olivehillplus/romstage.c b/src/mainboard/amd/olivehillplus/romstage.c
index 519825827a..bb80687b60 100644
--- a/src/mainboard/amd/olivehillplus/romstage.c
+++ b/src/mainboard/amd/olivehillplus/romstage.c
@@ -20,7 +20,6 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include <cpu/x86/bist.h>
#include <southbridge/amd/pi/hudson/hudson.h>
static void romstage_main_template(void)
@@ -47,10 +46,6 @@ static void romstage_main_template(void)
console_init();
}
- /* Halt if there was a built in self test failure */
- post_code(0x34);
- report_bist_failure(bist);
-
/* Load MPB */
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
diff --git a/src/mainboard/bap/ode_e21XX/romstage.c b/src/mainboard/bap/ode_e21XX/romstage.c
index 4c5a51b5a5..e58f875f2f 100644
--- a/src/mainboard/bap/ode_e21XX/romstage.c
+++ b/src/mainboard/bap/ode_e21XX/romstage.c
@@ -20,7 +20,6 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include <cpu/x86/bist.h>
#include <southbridge/amd/pi/hudson/hudson.h>
#include <superio/fintek/common/fintek.h>
#include <superio/fintek/f81866d/f81866d.h>
@@ -51,10 +50,6 @@ static void romstage_main_template(void)
console_init();
}
- /* Halt if there was a built in self test failure */
- post_code(0x34);
- report_bist_failure(bist);
-
/* Load MPB */
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c
index 8eb18181b5..6c97c576c1 100644
--- a/src/mainboard/pcengines/apu2/romstage.c
+++ b/src/mainboard/pcengines/apu2/romstage.c
@@ -22,7 +22,6 @@
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <northbridge/amd/agesa/state_machine.h>
-#include <cpu/x86/bist.h>
#include <southbridge/amd/pi/hudson/hudson.h>
#include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct5104d/nct5104d.h>