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authorFurquan Shaikh <furquan@google.com>2016-08-17 16:18:05 -0700
committerMartin Roth <martinroth@google.com>2016-08-19 03:04:31 +0200
commitd3d77beffa1e7c8d28deabeda0709e0a0beacce2 (patch)
treef53ce68c66a8b15646fa2caaa8498d6ff553212a /src/mainboard
parentcb6096d71d40c0d15a0abe18ffad1f47c3e7ebf5 (diff)
downloadcoreboot-d3d77beffa1e7c8d28deabeda0709e0a0beacce2.tar.xz
google/reef: Configure NFC gpios correctly before entering sleep
Before entering sleep, ensure that the NFC gpios are configured correctly to avoid leakage. BUG=chrome-os-partner:56281 Change-Id: I2bb2e7ba468df445aa5f6c2b22ae0a74fcaa44f6 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/16243 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/reef/gpio.h6
-rw-r--r--src/mainboard/google/reef/smihandler.c4
2 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/google/reef/gpio.h b/src/mainboard/google/reef/gpio.h
index be7f50193d..dbe70624da 100644
--- a/src/mainboard/google/reef/gpio.h
+++ b/src/mainboard/google/reef/gpio.h
@@ -350,6 +350,12 @@ static const struct pad_config early_gpio_table[] = {
PAD_CFG_NF(GPIO_129, UP_2K, DEEP, NF1), /* LPSS_I2C2_SCL */
};
+/* GPIO settings before entering sleep. */
+static const struct pad_config sleep_gpio_table[] = {
+ PAD_CFG_GPO(GPIO_150, 0, DEEP), /* NFC_RESET_ODL */
+ PAD_CFG_GPI_APIC_LOW(GPIO_20, NONE, DEEP), /* NFC_INT_L */
+};
+
/*
* The proto boards didn't have memory SKU pins, but the same ones can be
* utilized as post proto boards because the pins used were never connected
diff --git a/src/mainboard/google/reef/smihandler.c b/src/mainboard/google/reef/smihandler.c
index e26c176b1b..d33222be9d 100644
--- a/src/mainboard/google/reef/smihandler.c
+++ b/src/mainboard/google/reef/smihandler.c
@@ -19,7 +19,9 @@
#include <ec/google/chromeec/smm.h>
#include <soc/pm.h>
#include <soc/smm.h>
+#include <soc/gpio.h>
#include "ec.h"
+#include "gpio.h"
void mainboard_smi_gpi_handler(const struct gpi_status *sts)
{
@@ -29,6 +31,8 @@ void mainboard_smi_gpi_handler(const struct gpi_status *sts)
void mainboard_smi_sleep(u8 slp_typ)
{
+ gpio_configure_pads(sleep_gpio_table, ARRAY_SIZE(sleep_gpio_table));
+
if (slp_typ == ACPI_S3)
enable_gpe(GPIO_TIER_1_SCI);