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authorFelix Held <felix-coreboot@felixheld.de>2021-03-26 00:44:35 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-03-29 19:52:12 +0000
commitdd737142490828c3aa2244216a2fda6df26a4c47 (patch)
treee680860a83aee4fb245236deb5d2a02fe26e8b27 /src/mainboard
parent793f3717b4fd430f03455bdbbd071d5f7d104b57 (diff)
downloadcoreboot-dd737142490828c3aa2244216a2fda6df26a4c47.tar.xz
soc/amd/picasso: factor out UPD-M configuration from romstage
Move the parts of romstage.c that populate the UPD-M data structure to the newly created fsp_m_params.c file. Since platform_fsp_memory_init_params_cb gets called from the FSP driver and not directly from car_stage_entry the two code parts in romstage.c weren't directly interacting. Since soc/romstage.h only contains the mainboard_updm_update function prototype, rename it to soc/fsp.h. This patch also removes a few unused includes. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I52c21f13520dbdfab37587d17b3a8a3b1a780f36 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51834 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/zork/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/zork/romstage.c b/src/mainboard/google/zork/romstage.c
index 9ad167768f..f72789a3e0 100644
--- a/src/mainboard/google/zork/romstage.c
+++ b/src/mainboard/google/zork/romstage.c
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/variants.h>
-#include <soc/romstage.h>
+#include <soc/fsp.h>
void __weak variant_updm_update(FSP_M_CONFIG *mcfg) {}