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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2015-01-04 04:25:38 +1100
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2015-01-04 13:47:35 +0100
commite64f5b1bcd589b4ac517909f5332f9926ab7d642 (patch)
tree1c8d4df7ac235650bde6a6ce1c04327a715dad05 /src/mainboard
parent24fb03e767d3c81184e4a6ea80a31f62b4edac36 (diff)
downloadcoreboot-e64f5b1bcd589b4ac517909f5332f9926ab7d642.tar.xz
superio/intel/i3100: Use link-time symbol over .c includes
Change-Id: I83db9b189e672b0e1f25bc42b73639c375bea3e5 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/8054 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/intel/eagleheights/romstage.c2
-rw-r--r--src/mainboard/intel/mtarvon/romstage.c1
-rw-r--r--src/mainboard/intel/truxton/romstage.c1
3 files changed, 1 insertions, 3 deletions
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c
index c03c7d7301..b41e0c5cae 100644
--- a/src/mainboard/intel/eagleheights/romstage.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
@@ -33,7 +33,7 @@
#include "southbridge/intel/i3100/early_smbus.c"
#include "southbridge/intel/i3100/early_lpc.c"
#include "southbridge/intel/i3100/reset.c"
-#include "superio/intel/i3100/early_serial.c"
+#include <superio/intel/i3100/i3100.h>
#include <superio/smsc/smscsuperio/smscsuperio.h>
#include "northbridge/intel/i3100/i3100.h"
#include "southbridge/intel/i3100/i3100.h"
diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c
index 4691b5c0e8..959beab260 100644
--- a/src/mainboard/intel/mtarvon/romstage.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
@@ -30,7 +30,6 @@
#include "southbridge/intel/i3100/early_lpc.c"
#include "northbridge/intel/i3100/raminit.h"
#include <superio/intel/i3100/i3100.h>
-#include "superio/intel/i3100/early_serial.c"
#include "northbridge/intel/i3100/memory_initialized.c"
#include "cpu/x86/bist.h"
#include <spd.h>
diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c
index f75077833c..4c15f672a0 100644
--- a/src/mainboard/intel/truxton/romstage.c
+++ b/src/mainboard/intel/truxton/romstage.c
@@ -32,7 +32,6 @@
#include "northbridge/intel/i3100/raminit_ep80579.h"
#include <superio/intel/i3100/i3100.h>
#include "cpu/x86/mtrr/earlymtrr.c"
-#include "superio/intel/i3100/early_serial.c"
#include "lib/debug.c" // XXX
#include "cpu/x86/bist.h"
#include <spd.h>