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| author | Shamile Khan <shamile.khan@intel.com> | 2018-04-09 16:44:23 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-11 09:31:20 +0000 |
| commit | e9eb14079c22f00342f8f884791e24d82980c2b4 (patch) | |
| tree | aad6838527a06637a78268cd3d09f9b00609b68f /src/mainboard | |
| parent | bb3a5efaf7d684898899b97532629a32c575ae9c (diff) | |
| download | coreboot-e9eb14079c22f00342f8f884791e24d82980c2b4.tar.xz | |
soc/intel/common/block/gspi: Set Clock Update Bit for clock updates.
This is required for clock parameter settings to take effect.
BUG=b:75306520
BRANCH=None
TEST=On Octopus, used a scope to check that spi_clk fed to tpm is
1 MHz
Change-Id: Icdb617aa4aa944d46b3a56dab88d2008b01dea0d
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://review.coreboot.org/25573
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard')
0 files changed, 0 insertions, 0 deletions