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author | Sven Schnelle <svens@stackframe.org> | 2011-10-22 13:41:28 +0200 |
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committer | Sven Schnelle <svens@stackframe.org> | 2011-10-25 20:38:44 +0200 |
commit | f02c396f2665396817b78cdfb1f662e26b952a65 (patch) | |
tree | 87e015fc8692a3b38c6e2ea669ac5d0b29aaa362 /src/mainboard | |
parent | d2bc117f7957155da9587de6a4deebb6a101f2c6 (diff) | |
download | coreboot-f02c396f2665396817b78cdfb1f662e26b952a65.tar.xz |
T60: add _CST table
Used by power management code to enable Cx powersaving modes.
Change-Id: I02c6b10762245bc48f21a341286236e203421de0
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-on: http://review.coreboot.org/322
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/lenovo/t60/mainboard.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t60/mainboard.c b/src/mainboard/lenovo/t60/mainboard.c index d4f260d4f5..19ac221b98 100644 --- a/src/mainboard/lenovo/t60/mainboard.c +++ b/src/mainboard/lenovo/t60/mainboard.c @@ -35,6 +35,19 @@ #include <ec/lenovo/h8/h8.h> #include <northbridge/intel/i945/i945.h> #include <pc80/mc146818rtc.h> +#include <arch/x86/include/arch/acpigen.h> + +static struct cst_entry cst_entries[] = { + { 0x7f, 1, 2, 0, 1, 1, 1, 1000 }, + { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV2, 2, 1, 500 }, + { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 2, 17, 250 }, +}; + +int get_cst_entries(struct cst_entry **entries) +{ + *entries = cst_entries; + return ARRAY_SIZE(cst_entries); +} static void mainboard_enable(device_t dev) { |