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authorArthur Heymans <arthur@aheymans.xyz>2017-04-17 17:50:40 +0200
committerMartin Roth <martinroth@google.com>2017-04-24 19:45:04 +0200
commit00fd3ff507568d93cc1fb4e3c9d6742cde58fae0 (patch)
treea37a9c636a1cfc9d85082df9f70dfbed3d7cebba /src/mainboard
parent5e1194567f182e58eebd4d00370f0389a8c12b37 (diff)
downloadcoreboot-00fd3ff507568d93cc1fb4e3c9d6742cde58fae0.tar.xz
nb/pineview/raminit: Fix raminit failing on hot reset path
For raminit to succeed on a hot reset the following things are prevented from running: * Clearing self refresh * Setting memory frequency * programming sdram dll timings * programming rcomp TESTED on Intel d510mo. Change-Id: I8f7e5c2958df29a96cdf856ade2f4f33707ad362 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19337 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/intel/d510mo/romstage.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mainboard/intel/d510mo/romstage.c b/src/mainboard/intel/d510mo/romstage.c
index 3209d81ed1..d39d2f6542 100644
--- a/src/mainboard/intel/d510mo/romstage.c
+++ b/src/mainboard/intel/d510mo/romstage.c
@@ -121,7 +121,10 @@ void mainboard_romstage_entry(unsigned long bist)
post_code(0x30);
printk(BIOS_DEBUG, "Initializing memory\n");
- sdram_initialize(0, spd_addrmap);
+ if (MCHBAR32(0xf14) & (1 << 8)) /* HOT RESET */
+ sdram_initialize(BOOT_PATH_RESET, spd_addrmap);
+ else
+ sdram_initialize(BOOT_PATH_NORMAL, spd_addrmap);
printk(BIOS_DEBUG, "Memory initialized\n");
post_code(0x31);