mb/google/glados: convert to overridetree

Simplify glados variants by converting to overridetree format.

Change-Id: I6dd7a4b1ae7f1d3ce9fadb06ea95e021a1c880a5
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39983
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

15 files changed, 562 insertions, 1475 deletions

diff --git a/src/mainboard/google/glados/Kconfig b/src/mainboard/google/glados/Kconfig
index d0ff3776e0..5e3545a85c 100644
--- a/src/mainboard/google/glados/Kconfig
+++ b/src/mainboard/google/glados/Kconfig
@@ -60,9 +60,9 @@ config VARIANT_DIR
 	default "lars" if BOARD_GOOGLE_LARS
 	default "sentry" if BOARD_GOOGLE_SENTRY
 
-config DEVICETREE
+config OVERRIDE_DEVICETREE
 	string
-	default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+	default "variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 
 config MAX_CPUS
 	int
diff --git a/src/mainboard/google/glados/variants/lars/devicetree.cb b/src/mainboard/google/glados/devicetree.cb
index 35ce9a0294..e9c1cac69c 100644
--- a/src/mainboard/google/glados/variants/lars/devicetree.cb
+++ b/src/mainboard/google/glados/devicetree.cb
@@ -77,18 +77,6 @@ chip soc/intel/skylake
 	# RP 1 uses SRCCLKREQ1#
 	register "PcieRpClkReqNumber[0]" = "1"
 
-	register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)"	# Type-C Port 1
-	register "usb2_ports[1]" = "USB2_PORT_FLEX(OC_SKIP)"	# Camera
-	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth
-	register "usb2_ports[4]" = "USB2_PORT_MID(OC2)"		# Type-A Port (card)
-	register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)"	# SD
-	register "usb2_ports[8]" = "USB2_PORT_LONG(OC3)"	# Type-A Port (board)
-
-	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)"	# Type-C Port 1
-	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # SD
-	register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)"	# Type-A Port (card)
-	register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)"	# Type-A Port (board)
-
 	# Must leave UART0 enabled or SD/eMMC will not work as PCI
 	register "SerialIoDevMode" = "{
 		[PchSerialIoIndexI2C0]  = PchSerialIoPci,
@@ -127,23 +115,8 @@ chip soc/intel/skylake
 		device pci 14.0 on  end # USB xHCI
 		device pci 14.1 off end # USB xDCI (OTG)
 		device pci 14.2 on  end # Thermal Subsystem
-		device pci 15.0 on
-			chip drivers/i2c/generic
-				register "hid" = ""ELAN0001""
-				register "desc" = ""ELAN Touchscreen""
-				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)"
-				device i2c 10 on end
-			end
-		end # I2C #0
-		device pci 15.1 on
-			chip drivers/i2c/generic
-				register "hid" = ""ELAN0000""
-				register "desc" = ""ELAN Touchpad""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
-				register "wake" = "GPE0_DW0_05"
-				device i2c 15 on end
-			end
-		end # I2C #1
+		device pci 15.0 on  end # I2C #0
+		device pci 15.1 on  end # I2C #1
 		device pci 15.2 off end # I2C #2
 		device pci 15.3 off end # I2C #3
 		device pci 16.0 on  end # Management Engine Interface 1
@@ -154,30 +127,7 @@ chip soc/intel/skylake
 		device pci 17.0 off end # SATA
 		device pci 19.0 on  end # UART #2
 		device pci 19.1 off end # I2C #5
-		device pci 19.2 on
-			chip drivers/i2c/nau8825
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
-				register "jkdet_enable" = "1"
-				register "jkdet_pull_enable" = "1"
-				register "jkdet_pull_up" = "1"
-				register "jkdet_polarity" = "1"      # ActiveLow
-				register "vref_impedance" = "2"      # 125kOhm
-				register "micbias_voltage" = "6"     # 2.754
-				register "sar_threshold_num" = "4"
-				register "sar_threshold[0]" = "0x08"
-				register "sar_threshold[1]" = "0x12"
-				register "sar_threshold[2]" = "0x26"
-				register "sar_threshold[3]" = "0x73"
-				register "sar_hysteresis" = "0"
-				register "sar_voltage" = "6"
-				register "sar_compare_time" = "1"     # 1us
-				register "sar_sampling_time" = "1"    # 4us
-				register "short_key_debounce" = "3"   # 30ms
-				register "jack_insert_debounce" = "7" # 512ms
-				register "jack_eject_debounce" = "0"
-				device i2c 1a on end
-			end
-		end # I2C #4
+		device pci 19.2 on  end # I2C #4
 		device pci 1c.0 on
 			chip drivers/intel/wifi
 				register "wake" = "GPE0_DW0_16"
@@ -201,7 +151,7 @@ chip soc/intel/skylake
 		device pci 1e.3 off end # GSPI #1
 		device pci 1e.4 on  end # eMMC
 		device pci 1e.5 off end # SDIO
-		device pci 1e.6 off  end # SDCard
+		device pci 1e.6 off end # SDCard
 		device pci 1f.0 on
 			chip drivers/pc80/tpm
 				device pnp 0c31.0 on end
@@ -212,14 +162,7 @@ chip soc/intel/skylake
 		end # LPC Interface
 		device pci 1f.1 on  end # P2SB
 		device pci 1f.2 on  end # Power Management Controller
-		device pci 1f.3 on
-			chip drivers/generic/max98357a
-				register "hid" = ""MX98357A""
-				register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B2)"
-				register "sdmode_delay" = "5"
-				device generic 0 on end
-			end
-		end # Intel HDA
+		device pci 1f.3 on  end # Intel HDA
 		device pci 1f.4 on  end # SMBus
 		device pci 1f.5 on  end # PCH SPI
 		device pci 1f.6 off end # GbE
diff --git a/src/mainboard/google/glados/variants/asuka/devicetree.cb b/src/mainboard/google/glados/variants/asuka/devicetree.cb
deleted file mode 100644
index 395b5728b7..0000000000
--- a/src/mainboard/google/glados/variants/asuka/devicetree.cb
+++ /dev/null
@@ -1,227 +0,0 @@
-chip soc/intel/skylake
-
-	register "gpu_pp_up_delay_ms"		  = "200"
-	register "gpu_pp_down_delay_ms"		  = " 50"
-	register "gpu_pp_cycle_delay_ms"	  = "500"
-	register "gpu_pp_backlight_on_delay_ms"	  = "  1"
-	register "gpu_pp_backlight_off_delay_ms"  = "200"
-
-	register "gpu_pch_backlight_pwm_hz"	  = "1000"
-
-	# Enable deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
-	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
-
-	# GPE configuration
-	# Note that GPE events called out in ASL code rely on this
-	# route. i.e. If this route changes then the affected GPE
-	# offset bits also need to be changed.
-	register "gpe0_dw0" = "GPP_B"
-	register "gpe0_dw1" = "GPP_D"
-	register "gpe0_dw2" = "GPP_E"
-
-	# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
-	register "gen1_dec" = "0x00fc0801"
-	register "gen2_dec" = "0x000c0201"
-
-	# Enable "Intel Speed Shift Technology"
-	register "speed_shift_enable" = "1"
-
-	# Enable DPTF
-	register "dptf_enable" = "1"
-
-	# FSP Configuration
-	register "ProbelessTrace" = "0"
-	register "EnableLan" = "0"
-	register "EnableSata" = "0"
-	register "SataSalpSupport" = "0"
-	register "SataMode" = "0"
-	register "SataPortsEnable[0]" = "0"
-	register "EnableAzalia" = "1"
-	register "DspEnable" = "1"
-	register "IoBufferOwnership" = "3"
-	register "EnableTraceHub" = "0"
-	register "SsicPortEnable" = "0"
-	register "SmbusEnable" = "1"
-	register "Cio2Enable" = "0"
-	register "ScsEmmcEnabled" = "1"
-	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "0"
-	register "PttSwitch" = "0"
-	register "SkipExtGfxScan" = "1"
-	register "Device4Enable" = "1"
-	register "HeciEnabled" = "0"
-	register "SaGv" = "3"
-	register "PmConfigSlpS3MinAssert" = "2"        # 50ms
-	register "PmConfigSlpS4MinAssert" = "4"        # 4s
-	register "PmConfigSlpSusMinAssert" = "3"       # 4s
-	register "PmConfigSlpAMinAssert" = "3"         # 2s
-	register "PmTimerDisabled" = "1"
-
-	register "pirqa_routing" = "PCH_IRQ11"
-	register "pirqb_routing" = "PCH_IRQ10"
-	register "pirqc_routing" = "PCH_IRQ11"
-	register "pirqd_routing" = "PCH_IRQ11"
-	register "pirqe_routing" = "PCH_IRQ11"
-	register "pirqf_routing" = "PCH_IRQ11"
-	register "pirqg_routing" = "PCH_IRQ11"
-	register "pirqh_routing" = "PCH_IRQ11"
-
-	# Enable Root port 1
-	register "PcieRpEnable[0]" = "1"
-	# Enable CLKREQ#
-	register "PcieRpClkReqSupport[0]" = "1"
-	# RP 1 uses SRCCLKREQ1#
-	register "PcieRpClkReqNumber[0]" = "1"
-
-	register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)"	# Type-C Port 1
-	register "usb2_ports[1]" = "USB2_PORT_MID(OC2)"		# Card Reader
-	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth
-	register "usb2_ports[4]" = "USB2_PORT_MID(OC2)"		# Type-A Port (board)
-	register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)"	# Camera
-	register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)"	# PIC MCU
-	register "usb2_ports[8]" = "USB2_PORT_LONG(OC3)"	# Type-A Port (board)
-
-	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)"	# Type-C Port 1
-	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# Card Reader
-	register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)"	# Type-A Port (board)
-	register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)"	# Type-A Port (board)
-
-	# Must leave UART0 enabled or SD/eMMC will not work as PCI
-	register "SerialIoDevMode" = "{
-		[PchSerialIoIndexI2C0]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C1]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C2]  = PchSerialIoDisabled,
-		[PchSerialIoIndexI2C3]  = PchSerialIoDisabled,
-		[PchSerialIoIndexI2C4]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C5]  = PchSerialIoDisabled,
-		[PchSerialIoIndexSpi0]  = PchSerialIoDisabled,
-		[PchSerialIoIndexSpi1]  = PchSerialIoDisabled,
-		[PchSerialIoIndexUart0] = PchSerialIoPci,
-		[PchSerialIoIndexUart1] = PchSerialIoDisabled,
-		[PchSerialIoIndexUart2] = PchSerialIoSkipInit,
-	}"
-
-	# I2C4 is 1.8V
-	register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8"
-
-	# PL2 override 25W
-	register "tdp_pl2_override" = "25"
-
-	# Send an extra VR mailbox command for the PS4 exit issue
-	register "SendVrMbxCmd" = "2"
-
-	# Lock Down
-	register "common_soc_config" = "{
-		.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
-	}"
-
-	device cpu_cluster 0 on
-		device lapic 0 on end
-	end
-	device domain 0 on
-		device pci 00.0 on  end # Host Bridge
-		device pci 02.0 on  end # Integrated Graphics Device
-		device pci 14.0 on  end # USB xHCI
-		device pci 14.1 off end # USB xDCI (OTG)
-		device pci 14.2 on  end # Thermal Subsystem
-		device pci 15.0 on
-			chip drivers/i2c/generic
-				register "hid" = ""ELAN0001""
-				register "desc" = ""ELAN Touchscreen""
-				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)"
-				device i2c 10 on end
-			end
-		end # I2C #0
-		device pci 15.1 on
-			chip drivers/i2c/generic
-				register "hid" = ""ELAN0000""
-				register "desc" = ""ELAN Touchpad""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
-				register "wake" = "GPE0_DW0_05"
-				device i2c 15 on end
-			end
-		end # I2C #1
-		device pci 15.2 off end # I2C #2
-		device pci 15.3 off end # I2C #3
-		device pci 16.0 on  end # Management Engine Interface 1
-		device pci 16.1 off end # Management Engine Interface 2
-		device pci 16.2 off end # Management Engine IDE-R
-		device pci 16.3 off end # Management Engine KT Redirection
-		device pci 16.4 off end # Management Engine Interface 3
-		device pci 17.0 off end # SATA
-		device pci 19.0 on  end # UART #2
-		device pci 19.1 off end # I2C #5
-		device pci 19.2 on
-			chip drivers/i2c/nau8825
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
-				register "jkdet_enable" = "1"
-				register "jkdet_pull_enable" = "0"   # R389
-				register "jkdet_polarity" = "1"      # ActiveLow
-				register "vref_impedance" = "2"      # 125kOhm
-				register "micbias_voltage" = "6"     # 2.754
-				register "sar_threshold_num" = "4"
-				register "sar_threshold[0]" = "0x08"
-				register "sar_threshold[1]" = "0x12"
-				register "sar_threshold[2]" = "0x26"
-				register "sar_threshold[3]" = "0x73"
-				register "sar_hysteresis" = "0"
-				register "sar_voltage" = "6"
-				register "sar_compare_time" = "1"     # 1us
-				register "sar_sampling_time" = "1"    # 4us
-				register "short_key_debounce" = "3"   # 30ms
-				register "jack_insert_debounce" = "7" # 512ms
-				register "jack_eject_debounce" = "0"
-				device i2c 1a on end
-			end
-		end # I2C #4
-		device pci 1c.0 on
-			chip drivers/intel/wifi
-				register "wake" = "GPE0_DW0_16"
-				device pci 00.0 on end
-			end
-		end # PCI Express Port 1
-		device pci 1c.1 off end # PCI Express Port 2
-		device pci 1c.2 off end # PCI Express Port 3
-		device pci 1c.3 off end # PCI Express Port 4
-		device pci 1c.4 off end # PCI Express Port 5
-		device pci 1c.5 off end # PCI Express Port 6
-		device pci 1c.6 off end # PCI Express Port 7
-		device pci 1c.7 off end # PCI Express Port 8
-		device pci 1d.0 off end # PCI Express Port 9
-		device pci 1d.1 off end # PCI Express Port 10
-		device pci 1d.2 off end # PCI Express Port 11
-		device pci 1d.3 off end # PCI Express Port 12
-		device pci 1e.0 on  end # UART #0
-		device pci 1e.1 off end # UART #1
-		device pci 1e.2 off end # GSPI #0
-		device pci 1e.3 off end # GSPI #1
-		device pci 1e.4 on  end # eMMC
-		device pci 1e.5 off end # SDIO
-		device pci 1e.6 off end # SDCard
-		device pci 1f.0 on
-			chip drivers/pc80/tpm
-				device pnp 0c31.0 on end
-			end
-			chip ec/google/chromeec
-				device pnp 0c09.0 on end
-			end
-		end # LPC Interface
-		device pci 1f.1 on  end # P2SB
-		device pci 1f.2 on  end # Power Management Controller
-		device pci 1f.3 on
-			chip drivers/generic/max98357a
-				register "hid" = ""MX98357A""
-				register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)"
-				register "sdmode_delay" = "5"
-				device generic 0 on end
-			end
-		end # Intel HDA
-		device pci 1f.4 on  end # SMBus
-		device pci 1f.5 on  end # PCH SPI
-		device pci 1f.6 off end # GbE
-	end
-end
diff --git a/src/mainboard/google/glados/variants/asuka/overridetree.cb b/src/mainboard/google/glados/variants/asuka/overridetree.cb
new file mode 100644
index 0000000000..4be1fc6ae3
--- /dev/null
+++ b/src/mainboard/google/glados/variants/asuka/overridetree.cb
@@ -0,0 +1,66 @@
+chip soc/intel/skylake
+
+	register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)"	# Type-C Port 1
+	register "usb2_ports[1]" = "USB2_PORT_MID(OC2)"		# Card Reader
+	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth
+	register "usb2_ports[4]" = "USB2_PORT_MID(OC2)"		# Type-A Port (board)
+	register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)"	# Camera
+	register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)"	# PIC MCU
+	register "usb2_ports[8]" = "USB2_PORT_LONG(OC3)"	# Type-A Port (board)
+
+	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)"	# Type-C Port 1
+	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# Card Reader
+	register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)"	# Type-A Port (board)
+	register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)"	# Type-A Port (board)
+
+	device domain 0 on
+		device pci 15.0 on
+			chip drivers/i2c/generic
+				register "hid" = ""ELAN0001""
+				register "desc" = ""ELAN Touchscreen""
+				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)"
+				device i2c 10 on end
+			end
+		end # I2C #0
+		device pci 15.1 on
+			chip drivers/i2c/generic
+				register "hid" = ""ELAN0000""
+				register "desc" = ""ELAN Touchpad""
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
+				register "wake" = "GPE0_DW0_05"
+				device i2c 15 on end
+			end
+		end # I2C #1
+		device pci 19.2 on
+			chip drivers/i2c/nau8825
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
+				register "jkdet_enable" = "1"
+				register "jkdet_pull_enable" = "0"	# R389
+				register "jkdet_polarity" = "1"		# ActiveLow
+				register "vref_impedance" = "2"		# 125kOhm
+				register "micbias_voltage" = "6"	# 2.754
+				register "sar_threshold_num" = "4"
+				register "sar_threshold[0]" = "0x08"
+				register "sar_threshold[1]" = "0x12"
+				register "sar_threshold[2]" = "0x26"
+				register "sar_threshold[3]" = "0x73"
+				register "sar_hysteresis" = "0"
+				register "sar_voltage" = "6"
+				register "sar_compare_time" = "1"	# 1us
+				register "sar_sampling_time" = "1"	# 4us
+				register "short_key_debounce" = "3"	# 30ms
+				register "jack_insert_debounce" = "7"	# 512ms
+				register "jack_eject_debounce" = "0"
+				device i2c 1a on end
+			end
+		end # I2C #4
+		device pci 1f.3 on
+			chip drivers/generic/max98357a
+				register "hid" = ""MX98357A""
+				register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)"
+				register "sdmode_delay" = "5"
+				device generic 0 on end
+			end
+		end # Intel HDA
+	end
+end
diff --git a/src/mainboard/google/glados/variants/caroline/devicetree.cb b/src/mainboard/google/glados/variants/caroline/devicetree.cb
deleted file mode 100644
index 3e733d6b1c..0000000000
--- a/src/mainboard/google/glados/variants/caroline/devicetree.cb
+++ /dev/null
@@ -1,241 +0,0 @@
-chip soc/intel/skylake
-
-	register "gpu_pp_up_delay_ms"		  = "200"
-	register "gpu_pp_down_delay_ms"		  = " 50"
-	register "gpu_pp_cycle_delay_ms"	  = "500"
-	register "gpu_pp_backlight_on_delay_ms"	  = "  1"
-	register "gpu_pp_backlight_off_delay_ms"  = "200"
-
-	register "gpu_pch_backlight_pwm_hz"	  = "1000"
-
-	# Enable deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
-	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
-
-	# GPE configuration
-	# Note that GPE events called out in ASL code rely on this
-	# route. i.e. If this route changes then the affected GPE
-	# offset bits also need to be changed.
-	register "gpe0_dw0" = "GPP_B"
-	register "gpe0_dw1" = "GPP_D"
-	register "gpe0_dw2" = "GPP_E"
-
-	# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
-	register "gen1_dec" = "0x00fc0801"
-	register "gen2_dec" = "0x000c0201"
-
-	# Enable "Intel Speed Shift Technology"
-	register "speed_shift_enable" = "1"
-
-	# Enable DPTF
-	register "dptf_enable" = "1"
-
-	# FSP Configuration
-	register "ProbelessTrace" = "0"
-	register "EnableLan" = "0"
-	register "EnableSata" = "0"
-	register "SataSalpSupport" = "0"
-	register "SataMode" = "0"
-	register "SataPortsEnable[0]" = "0"
-	register "EnableAzalia" = "1"
-	register "DspEnable" = "1"
-	register "IoBufferOwnership" = "3"
-	register "EnableTraceHub" = "0"
-	register "SsicPortEnable" = "0"
-	register "SmbusEnable" = "1"
-	register "Cio2Enable" = "0"
-	register "ScsEmmcEnabled" = "1"
-	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "2"
-	register "PttSwitch" = "0"
-	register "SkipExtGfxScan" = "1"
-	register "Device4Enable" = "1"
-	register "HeciEnabled" = "0"
-	register "SaGv" = "3"
-	register "PmConfigSlpS3MinAssert" = "2"        # 50ms
-	register "PmConfigSlpS4MinAssert" = "1"        # 1s
-	register "PmConfigSlpSusMinAssert" = "1"       # 500ms
-	register "PmConfigSlpAMinAssert" = "3"         # 2s
-	register "PmTimerDisabled" = "1"
-
-	register "pirqa_routing" = "PCH_IRQ11"
-	register "pirqb_routing" = "PCH_IRQ10"
-	register "pirqc_routing" = "PCH_IRQ11"
-	register "pirqd_routing" = "PCH_IRQ11"
-	register "pirqe_routing" = "PCH_IRQ11"
-	register "pirqf_routing" = "PCH_IRQ11"
-	register "pirqg_routing" = "PCH_IRQ11"
-	register "pirqh_routing" = "PCH_IRQ11"
-
-	# VR Slew rate setting for improving audible noise
-	register "AcousticNoiseMitigation" = "1"
-	register "SlowSlewRateForIa" = "3"	# Fast/16
-	register "SlowSlewRateForGt" = "3"	# Fast/16
-	register "SlowSlewRateForSa" = "0"	# Fast/2
-	register "FastPkgCRampDisable" = "0"
-
-	# Enable Root port 1
-	register "PcieRpEnable[0]" = "1"
-	# Enable CLKREQ#
-	register "PcieRpClkReqSupport[0]" = "1"
-	# RP 1 uses SRCCLKREQ1#
-	register "PcieRpClkReqNumber[0]" = "1"
-
-	register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)"	# Type-C Port (main)
-	register "usb2_ports[1]" = "USB2_PORT_MAX(OC_SKIP)"	# Type-C Port (sub)
-	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth
-	register "usb2_ports[4]" = "USB2_PORT_EMPTY"		# Empty
-	register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)"	# Camera
-	register "usb2_ports[8]" = "USB2_PORT_EMPTY"		# Empty
-
-	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port (main)
-	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port (sub)
-	register "usb3_ports[2]" = "USB3_PORT_EMPTY"		# Empty
-	register "usb3_ports[3]" = "USB3_PORT_EMPTY"		# Empty
-
-	# Must leave UART0 enabled or SD/eMMC will not work as PCI
-	register "SerialIoDevMode" = "{
-		[PchSerialIoIndexI2C0]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C1]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C2]  = PchSerialIoDisabled,
-		[PchSerialIoIndexI2C3]  = PchSerialIoDisabled,
-		[PchSerialIoIndexI2C4]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C5]  = PchSerialIoDisabled,
-		[PchSerialIoIndexSpi0]  = PchSerialIoDisabled,
-		[PchSerialIoIndexSpi1]  = PchSerialIoDisabled,
-		[PchSerialIoIndexUart0] = PchSerialIoPci,
-		[PchSerialIoIndexUart1] = PchSerialIoDisabled,
-		[PchSerialIoIndexUart2] = PchSerialIoSkipInit,
-	}"
-
-	# I2C4 is 1.8V
-	register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8"
-
-	# PL2 override 15W
-	register "tdp_pl2_override" = "15"
-
-	# Send an extra VR mailbox command for the supported MPS IMVP8 model
-	register "SendVrMbxCmd" = "1"
-
-	# TCC of 90C
-	register "tcc_offset" = "10"
-
-	# Lock Down
-	register "common_soc_config" = "{
-		.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
-	}"
-
-	device cpu_cluster 0 on
-		device lapic 0 on end
-	end
-	device domain 0 on
-		device pci 00.0 on  end # Host Bridge
-		device pci 02.0 on  end # Integrated Graphics Device
-		device pci 14.0 on  end # USB xHCI
-		device pci 14.1 off end # USB xDCI (OTG)
-		device pci 14.2 on  end # Thermal Subsystem
-		device pci 15.0 on
-			chip drivers/i2c/generic
-				register "hid" = ""ATML0001""
-				register "desc" = ""Atmel Touchscreen""
-				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)"
-				device i2c 4b on end
-			end
-		end # I2C #0
-		device pci 15.1 on
-			chip drivers/i2c/generic
-				register "hid" = ""ATML0000""
-				register "desc" = ""Atmel Touchpad""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
-				register "wake" = "GPE0_DW0_05"
-				device i2c 4a on end
-			end
-		end # I2C #1
-		device pci 15.2 off end # I2C #2
-		device pci 15.3 off end # I2C #3
-		device pci 16.0 on  end # Management Engine Interface 1
-		device pci 16.1 off end # Management Engine Interface 2
-		device pci 16.2 off end # Management Engine IDE-R
-		device pci 16.3 off end # Management Engine KT Redirection
-		device pci 16.4 off end # Management Engine Interface 3
-		device pci 17.0 off end # SATA
-		device pci 19.0 on  end # UART #2
-		device pci 19.1 off end # I2C #5
-		device pci 19.2 on
-			chip drivers/i2c/nau8825
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
-				register "jkdet_enable" = "1"
-				register "jkdet_pull_enable" = "0"   # R389
-				register "jkdet_polarity" = "1"      # ActiveLow
-				register "vref_impedance" = "2"      # 125kOhm
-				register "micbias_voltage" = "6"     # 2.754
-				register "sar_threshold_num" = "4"
-				register "sar_threshold[0]" = "0x0c"
-				register "sar_threshold[1]" = "0x1c"
-				register "sar_threshold[2]" = "0x38"
-				register "sar_threshold[3]" = "0x60"
-				register "sar_hysteresis" = "1"
-				register "sar_voltage" = "0"          # VDDA
-				register "sar_compare_time" = "0"     # 500ns
-				register "sar_sampling_time" = "0"    # 2us
-				register "short_key_debounce" = "2"   # 100ms
-				register "jack_insert_debounce" = "4" # 64ms
-				register "jack_eject_debounce" = "4"  # 64ms
-				device i2c 1a on end
-			end
-			chip drivers/i2c/generic
-				register "hid" = ""INT343B""
-				register "desc" = ""SSM4567 Left Speaker Amp""
-				register "uid" = "0"
-				device i2c 34 on end
-			end
-			chip drivers/i2c/generic
-				register "hid" = ""INT343B""
-				register "desc" = ""SSM4567 Right Speaker Amp""
-				register "uid" = "1"
-				device i2c 35 on end
-			end
-		end # I2C #4
-		device pci 1c.0 on
-			chip drivers/intel/wifi
-				register "wake" = "GPE0_DW0_16"
-				device pci 00.0 on end
-			end
-		end # PCI Express Port 1
-		device pci 1c.1 off end # PCI Express Port 2
-		device pci 1c.2 off end # PCI Express Port 3
-		device pci 1c.3 off end # PCI Express Port 4
-		device pci 1c.4 off end # PCI Express Port 5
-		device pci 1c.5 off end # PCI Express Port 6
-		device pci 1c.6 off end # PCI Express Port 7
-		device pci 1c.7 off end # PCI Express Port 8
-		device pci 1d.0 off end # PCI Express Port 9
-		device pci 1d.1 off end # PCI Express Port 10
-		device pci 1d.2 off end # PCI Express Port 11
-		device pci 1d.3 off end # PCI Express Port 12
-		device pci 1e.0 on  end # UART #0
-		device pci 1e.1 off end # UART #1
-		device pci 1e.2 off end # GSPI #0
-		device pci 1e.3 off end # GSPI #1
-		device pci 1e.4 on  end # eMMC
-		device pci 1e.5 off end # SDIO
-		device pci 1e.6 on  end # SDCard
-		device pci 1f.0 on
-			chip drivers/pc80/tpm
-				device pnp 0c31.0 on end
-			end
-			chip ec/google/chromeec
-				device pnp 0c09.0 on end
-			end
-		end # LPC Interface
-		device pci 1f.1 on  end # P2SB
-		device pci 1f.2 on  end # Power Management Controller
-		device pci 1f.3 on  end # Intel HDA
-		device pci 1f.4 on  end # SMBus
-		device pci 1f.5 on  end # PCH SPI
-		device pci 1f.6 off end # GbE
-	end
-end
diff --git a/src/mainboard/google/glados/variants/caroline/overridetree.cb b/src/mainboard/google/glados/variants/caroline/overridetree.cb
new file mode 100644
index 0000000000..ce364801ca
--- /dev/null
+++ b/src/mainboard/google/glados/variants/caroline/overridetree.cb
@@ -0,0 +1,91 @@
+chip soc/intel/skylake
+
+	register "ScsSdCardEnabled" = "2"
+
+	register "PmConfigSlpS4MinAssert" = "1"		# 1s
+	register "PmConfigSlpSusMinAssert" = "1"	# 500ms
+
+	# VR Slew rate setting for improving audible noise
+	register "AcousticNoiseMitigation" = "1"
+	register "SlowSlewRateForIa" = "3"	# Fast/16
+	register "SlowSlewRateForGt" = "3"	# Fast/16
+	register "SlowSlewRateForSa" = "0"	# Fast/2
+	register "FastPkgCRampDisable" = "0"
+
+	register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)"	# Type-C Port (main)
+	register "usb2_ports[1]" = "USB2_PORT_MAX(OC_SKIP)"	# Type-C Port (sub)
+	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth
+	register "usb2_ports[4]" = "USB2_PORT_EMPTY"		# Empty
+	register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)"	# Camera
+	register "usb2_ports[8]" = "USB2_PORT_EMPTY"		# Empty
+
+	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port (main)
+	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port (sub)
+	register "usb3_ports[2]" = "USB3_PORT_EMPTY"		# Empty
+	register "usb3_ports[3]" = "USB3_PORT_EMPTY"		# Empty
+
+	# PL2 override 15W
+	register "tdp_pl2_override" = "15"
+
+	# Send an extra VR mailbox command for the supported MPS IMVP8 model
+	register "SendVrMbxCmd" = "1"
+
+	# TCC of 90C
+	register "tcc_offset" = "10"
+
+	device domain 0 on
+		device pci 15.0 on
+			chip drivers/i2c/generic
+				register "hid" = ""ATML0001""
+				register "desc" = ""Atmel Touchscreen""
+				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)"
+				device i2c 4b on end
+			end
+		end # I2C #0
+		device pci 15.1 on
+			chip drivers/i2c/generic
+				register "hid" = ""ATML0000""
+				register "desc" = ""Atmel Touchpad""
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
+				register "wake" = "GPE0_DW0_05"
+				device i2c 4a on end
+			end
+		end # I2C #1
+		device pci 19.2 on
+			chip drivers/i2c/nau8825
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
+				register "jkdet_enable" = "1"
+				register "jkdet_pull_enable" = "0"	# R389
+				register "jkdet_polarity" = "1"		# ActiveLow
+				register "vref_impedance" = "2"		# 125kOhm
+				register "micbias_voltage" = "6"	# 2.754
+				register "sar_threshold_num" = "4"
+				register "sar_threshold[0]" = "0x0c"
+				register "sar_threshold[1]" = "0x1c"
+				register "sar_threshold[2]" = "0x38"
+				register "sar_threshold[3]" = "0x60"
+				register "sar_hysteresis" = "1"
+				register "sar_voltage" = "0"		# VDDA
+				register "sar_compare_time" = "0"	# 500ns
+				register "sar_sampling_time" = "0"	# 2us
+				register "short_key_debounce" = "2"	# 100ms
+				register "jack_insert_debounce" = "4"	# 64ms
+				register "jack_eject_debounce" = "4"	# 64ms
+				device i2c 1a on end
+			end
+			chip drivers/i2c/generic
+				register "hid" = ""INT343B""
+				register "desc" = ""SSM4567 Left Speaker Amp""
+				register "uid" = "0"
+				device i2c 34 on end
+			end
+			chip drivers/i2c/generic
+				register "hid" = ""INT343B""
+				register "desc" = ""SSM4567 Right Speaker Amp""
+				register "uid" = "1"
+				device i2c 35 on end
+			end
+		end # I2C #4
+		device pci 1e.6 on  end # SDCard
+	end
+end
diff --git a/src/mainboard/google/glados/variants/cave/devicetree.cb b/src/mainboard/google/glados/variants/cave/devicetree.cb
deleted file mode 100644
index ccc2302a58..0000000000
--- a/src/mainboard/google/glados/variants/cave/devicetree.cb
+++ /dev/null
@@ -1,232 +0,0 @@
-chip soc/intel/skylake
-
-	register "gpu_pp_up_delay_ms"		  = "200"
-	register "gpu_pp_down_delay_ms"		  = " 50"
-	register "gpu_pp_cycle_delay_ms"	  = "500"
-	register "gpu_pp_backlight_on_delay_ms"	  = "  1"
-	register "gpu_pp_backlight_off_delay_ms"  = "200"
-
-	register "gpu_pch_backlight_pwm_hz"	  = "1000"
-
-	# Enable deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
-	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
-
-	# GPE configuration
-	# Note that GPE events called out in ASL code rely on this
-	# route. i.e. If this route changes then the affected GPE
-	# offset bits also need to be changed.
-	register "gpe0_dw0" = "GPP_B"
-	register "gpe0_dw1" = "GPP_D"
-	register "gpe0_dw2" = "GPP_E"
-
-	# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
-	register "gen1_dec" = "0x00fc0801"
-	register "gen2_dec" = "0x000c0201"
-
-	# Enable "Intel Speed Shift Technology"
-	register "speed_shift_enable" = "1"
-
-	# Enable DPTF
-	register "dptf_enable" = "1"
-
-	# FSP Configuration
-	register "ProbelessTrace" = "0"
-	register "EnableLan" = "0"
-	register "EnableSata" = "0"
-	register "SataSalpSupport" = "0"
-	register "SataMode" = "0"
-	register "SataPortsEnable[0]" = "0"
-	register "EnableAzalia" = "1"
-	register "DspEnable" = "1"
-	register "IoBufferOwnership" = "3"
-	register "EnableTraceHub" = "0"
-	register "SsicPortEnable" = "0"
-	register "SmbusEnable" = "1"
-	register "Cio2Enable" = "0"
-	register "ScsEmmcEnabled" = "1"
-	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "2"
-	register "PttSwitch" = "0"
-	register "SkipExtGfxScan" = "1"
-	register "Device4Enable" = "1"
-	register "HeciEnabled" = "0"
-	register "SaGv" = "3"
-	register "PmConfigSlpS3MinAssert" = "2"        # 50ms
-	register "PmConfigSlpS4MinAssert" = "1"        # 1s
-	register "PmConfigSlpSusMinAssert" = "1"       # 500ms
-	register "PmConfigSlpAMinAssert" = "3"         # 2s
-	register "PmTimerDisabled" = "1"
-
-	register "pirqa_routing" = "PCH_IRQ11"
-	register "pirqb_routing" = "PCH_IRQ10"
-	register "pirqc_routing" = "PCH_IRQ11"
-	register "pirqd_routing" = "PCH_IRQ11"
-	register "pirqe_routing" = "PCH_IRQ11"
-	register "pirqf_routing" = "PCH_IRQ11"
-	register "pirqg_routing" = "PCH_IRQ11"
-	register "pirqh_routing" = "PCH_IRQ11"
-
-	# Enable Root port 1
-	register "PcieRpEnable[0]" = "1"
-	# Enable CLKREQ#
-	register "PcieRpClkReqSupport[0]" = "1"
-	# RP 1 uses SRCCLKREQ1#
-	register "PcieRpClkReqNumber[0]" = "1"
-
-	register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)"  # Type-C Port (board)
-	register "usb2_ports[1]" = "USB2_PORT_MAX(OC_SKIP)"     # Type-C Port (flex)
-	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"     # Bluetooth
-	register "usb2_ports[4]" = "USB2_PORT_EMPTY"   # Type-A Port 1
-	register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)"    # Camera
-	register "usb2_ports[8]" = "USB2_PORT_EMPTY"   # Type-A Port 2
-
-	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port (board)
-	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port (flex)
-	register "usb3_ports[2]" = "USB3_PORT_EMPTY"   # Type-A Port 1
-	register "usb3_ports[3]" = "USB3_PORT_EMPTY"   # Type-A Port 2
-
-	# Must leave UART0 enabled or SD/eMMC will not work as PCI
-	register "SerialIoDevMode" = "{
-		[PchSerialIoIndexI2C0]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C1]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C2]  = PchSerialIoDisabled,
-		[PchSerialIoIndexI2C3]  = PchSerialIoDisabled,
-		[PchSerialIoIndexI2C4]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C5]  = PchSerialIoDisabled,
-		[PchSerialIoIndexSpi0]  = PchSerialIoDisabled,
-		[PchSerialIoIndexSpi1]  = PchSerialIoDisabled,
-		[PchSerialIoIndexUart0] = PchSerialIoPci,
-		[PchSerialIoIndexUart1] = PchSerialIoDisabled,
-		[PchSerialIoIndexUart2] = PchSerialIoSkipInit,
-	}"
-
-	# I2C4 is 1.8V
-	register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8"
-
-	# PL2 override 15W
-	register "tdp_pl2_override" = "15"
-
-	# Send an extra VR mailbox command for the supported MPS IMVP8 model
-	register "SendVrMbxCmd" = "1"
-
-	# TCC of 90C
-	register "tcc_offset" = "10"
-
-	# Use default SD card detect GPIO configuration
-	register "sdcard_cd_gpio_default" = "GPP_A7"
-
-	# Lock Down
-	register "common_soc_config" = "{
-		.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
-	}"
-
-	device cpu_cluster 0 on
-		device lapic 0 on end
-	end
-	device domain 0 on
-		device pci 00.0 on  end # Host Bridge
-		device pci 02.0 on  end # Integrated Graphics Device
-		device pci 14.0 on  end # USB xHCI
-		device pci 14.1 off end # USB xDCI (OTG)
-		device pci 14.2 on  end # Thermal Subsystem
-		device pci 15.0 on
-			chip drivers/i2c/generic
-				register "hid" = ""ELAN0001""
-				register "desc" = ""ELAN Touchscreen""
-				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)"
-				device i2c 10 on end
-			end
-		end # I2C #0
-		device pci 15.1 on
-			chip drivers/i2c/generic
-				register "hid" = ""ELAN0000""
-				register "desc" = ""ELAN Touchpad""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
-				register "wake" = "GPE0_DW0_05"
-				device i2c 15 on end
-			end
-		end # I2C #1
-		device pci 15.2 off end # I2C #2
-		device pci 15.3 off end # I2C #3
-		device pci 16.0 on  end # Management Engine Interface 1
-		device pci 16.1 off end # Management Engine Interface 2
-		device pci 16.2 off end # Management Engine IDE-R
-		device pci 16.3 off end # Management Engine KT Redirection
-		device pci 16.4 off end # Management Engine Interface 3
-		device pci 17.0 off end # SATA
-		device pci 19.0 on  end # UART #2
-		device pci 19.1 off end # I2C #5
-		device pci 19.2 on
-			chip drivers/i2c/nau8825
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
-				register "jkdet_enable" = "1"
-				register "jkdet_pull_enable" = "0"   # R389
-				register "jkdet_polarity" = "1"      # ActiveLow
-				register "vref_impedance" = "2"      # 125kOhm
-				register "micbias_voltage" = "6"     # 2.754
-				register "sar_threshold_num" = "4"
-				register "sar_threshold[0]" = "0x0c"
-				register "sar_threshold[1]" = "0x1e"
-				register "sar_threshold[2]" = "0x38"
-				register "sar_threshold[3]" = "0x60"
-				register "sar_hysteresis" = "1"
-				register "sar_voltage" = "0"          # VDDA
-				register "sar_compare_time" = "0"     # 500ns
-				register "sar_sampling_time" = "0"    # 2us
-				register "short_key_debounce" = "2"   # 100ms
-				register "jack_insert_debounce" = "7" # 512ms
-				register "jack_eject_debounce" = "7"  # 512ms
-				device i2c 1a on end
-			end
-		end # I2C #4
-		device pci 1c.0 on
-			chip drivers/intel/wifi
-				register "wake" = "GPE0_DW0_16"
-				device pci 00.0 on end
-			end
-		end # PCI Express Port 1
-		device pci 1c.1 off end # PCI Express Port 2
-		device pci 1c.2 off end # PCI Express Port 3
-		device pci 1c.3 off end # PCI Express Port 4
-		device pci 1c.4 off end # PCI Express Port 5
-		device pci 1c.5 off end # PCI Express Port 6
-		device pci 1c.6 off end # PCI Express Port 7
-		device pci 1c.7 off end # PCI Express Port 8
-		device pci 1d.0 off end # PCI Express Port 9
-		device pci 1d.1 off end # PCI Express Port 10
-		device pci 1d.2 off end # PCI Express Port 11
-		device pci 1d.3 off end # PCI Express Port 12
-		device pci 1e.0 on  end # UART #0
-		device pci 1e.1 off end # UART #1
-		device pci 1e.2 off end # GSPI #0
-		device pci 1e.3 off end # GSPI #1
-		device pci 1e.4 on  end # eMMC
-		device pci 1e.5 off end # SDIO
-		device pci 1e.6 on  end # SDCard
-		device pci 1f.0 on
-			chip drivers/pc80/tpm
-				device pnp 0c31.0 on end
-			end
-			chip ec/google/chromeec
-				device pnp 0c09.0 on end
-			end
-		end # LPC Interface
-		device pci 1f.1 on  end # P2SB
-		device pci 1f.2 on  end # Power Management Controller
-		device pci 1f.3 on
-			chip drivers/generic/max98357a
-				register "hid" = ""MX98357A""
-				register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)"
-				register "sdmode_delay" = "5"
-				device generic 0 on end
-			end
-		end # Intel HDA
-		device pci 1f.4 on  end # SMBus
-		device pci 1f.5 on  end # PCH SPI
-		device pci 1f.6 off end # GbE
-	end
-end
diff --git a/src/mainboard/google/glados/variants/cave/overridetree.cb b/src/mainboard/google/glados/variants/cave/overridetree.cb
new file mode 100644
index 0000000000..ae32b3dabf
--- /dev/null
+++ b/src/mainboard/google/glados/variants/cave/overridetree.cb
@@ -0,0 +1,83 @@
+chip soc/intel/skylake
+
+	register "ScsSdCardEnabled" = "2"
+
+	register "PmConfigSlpS4MinAssert" = "1"		# 1s
+	register "PmConfigSlpSusMinAssert" = "1"	# 500ms
+
+	register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)"	# Type-C Port (board)
+	register "usb2_ports[1]" = "USB2_PORT_MAX(OC_SKIP)"	# Type-C Port (flex)
+	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth
+	register "usb2_ports[4]" = "USB2_PORT_EMPTY"		# Type-A Port 1
+	register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)"	# Camera
+	register "usb2_ports[8]" = "USB2_PORT_EMPTY"		# Type-A Port 2
+
+	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# Type-C Port (board)
+	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# Type-C Port (flex)
+	register "usb3_ports[2]" = "USB3_PORT_EMPTY"		# Type-A Port 1
+	register "usb3_ports[3]" = "USB3_PORT_EMPTY"		# Type-A Port 2
+
+	# PL2 override 15W
+	register "tdp_pl2_override" = "15"
+
+	# Send an extra VR mailbox command for the supported MPS IMVP8 model
+	register "SendVrMbxCmd" = "1"
+
+	# TCC of 90C
+	register "tcc_offset" = "10"
+
+	# Use default SD card detect GPIO configuration
+	register "sdcard_cd_gpio_default" = "GPP_A7"
+
+	device domain 0 on
+		device pci 15.0 on
+			chip drivers/i2c/generic
+				register "hid" = ""ELAN0001""
+				register "desc" = ""ELAN Touchscreen""
+				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)"
+				device i2c 10 on end
+			end
+		end # I2C #0
+		device pci 15.1 on
+			chip drivers/i2c/generic
+				register "hid" = ""ELAN0000""
+				register "desc" = ""ELAN Touchpad""
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
+				register "wake" = "GPE0_DW0_05"
+				device i2c 15 on end
+			end
+		end # I2C #1
+		device pci 19.2 on
+			chip drivers/i2c/nau8825
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
+				register "jkdet_enable" = "1"
+				register "jkdet_pull_enable" = "0"	# R389
+				register "jkdet_polarity" = "1"		# ActiveLow
+				register "vref_impedance" = "2"		# 125kOhm
+				register "micbias_voltage" = "6"	# 2.754
+				register "sar_threshold_num" = "4"
+				register "sar_threshold[0]" = "0x0c"
+				register "sar_threshold[1]" = "0x1e"
+				register "sar_threshold[2]" = "0x38"
+				register "sar_threshold[3]" = "0x60"
+				register "sar_hysteresis" = "1"
+				register "sar_voltage" = "0"		# VDDA
+				register "sar_compare_time" = "0"	# 500ns
+				register "sar_sampling_time" = "0"	# 2us
+				register "short_key_debounce" = "2"	# 100ms
+				register "jack_insert_debounce" = "7"	# 512ms
+				register "jack_eject_debounce" = "7"	# 512ms
+				device i2c 1a on end
+			end
+		end # I2C #4
+		device pci 1e.6 on  end # SDCard
+		device pci 1f.3 on
+			chip drivers/generic/max98357a
+				register "hid" = ""MX98357A""
+				register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)"
+				register "sdmode_delay" = "5"
+				device generic 0 on end
+			end
+		end # Intel HDA
+	end
+end
diff --git a/src/mainboard/google/glados/variants/chell/devicetree.cb b/src/mainboard/google/glados/variants/chell/devicetree.cb
deleted file mode 100644
index bbc74f8d97..0000000000
--- a/src/mainboard/google/glados/variants/chell/devicetree.cb
+++ /dev/null
@@ -1,228 +0,0 @@
-chip soc/intel/skylake
-
-	register "gpu_pp_up_delay_ms"		  = "200"
-	register "gpu_pp_down_delay_ms"		  = " 50"
-	register "gpu_pp_cycle_delay_ms"	  = "500"
-	register "gpu_pp_backlight_on_delay_ms"	  = "  1"
-	register "gpu_pp_backlight_off_delay_ms"  = "200"
-
-	register "gpu_pch_backlight_pwm_hz"	  = "1000"
-
-	# Enable deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
-	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
-
-	# GPE configuration
-	# Note that GPE events called out in ASL code rely on this
-	# route. i.e. If this route changes then the affected GPE
-	# offset bits also need to be changed.
-	register "gpe0_dw0" = "GPP_B"
-	register "gpe0_dw1" = "GPP_D"
-	register "gpe0_dw2" = "GPP_E"
-
-	# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
-	register "gen1_dec" = "0x00fc0801"
-	register "gen2_dec" = "0x000c0201"
-
-	# Enable "Intel Speed Shift Technology"
-	register "speed_shift_enable" = "1"
-
-	# Enable DPTF
-	register "dptf_enable" = "1"
-
-	# FSP Configuration
-	register "ProbelessTrace" = "0"
-	register "EnableLan" = "0"
-	register "EnableSata" = "0"
-	register "SataSalpSupport" = "0"
-	register "SataMode" = "0"
-	register "SataPortsEnable[0]" = "0"
-	register "EnableAzalia" = "1"
-	register "DspEnable" = "1"
-	register "IoBufferOwnership" = "3"
-	register "EnableTraceHub" = "0"
-	register "SsicPortEnable" = "0"
-	register "SmbusEnable" = "1"
-	register "Cio2Enable" = "0"
-	register "ScsEmmcEnabled" = "1"
-	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "0"
-	register "PttSwitch" = "0"
-	register "SkipExtGfxScan" = "1"
-	register "Device4Enable" = "1"
-	register "HeciEnabled" = "0"
-	register "SaGv" = "3"
-	register "PmConfigSlpS3MinAssert" = "2"        # 50ms
-	register "PmConfigSlpS4MinAssert" = "1"        # 1s
-	register "PmConfigSlpSusMinAssert" = "1"       # 500ms
-	register "PmConfigSlpAMinAssert" = "3"         # 2s
-	register "PmTimerDisabled" = "1"
-
-	register "pirqa_routing" = "PCH_IRQ11"
-	register "pirqb_routing" = "PCH_IRQ10"
-	register "pirqc_routing" = "PCH_IRQ11"
-	register "pirqd_routing" = "PCH_IRQ11"
-	register "pirqe_routing" = "PCH_IRQ11"
-	register "pirqf_routing" = "PCH_IRQ11"
-	register "pirqg_routing" = "PCH_IRQ11"
-	register "pirqh_routing" = "PCH_IRQ11"
-
-	# Enable Root port 1
-	register "PcieRpEnable[0]" = "1"
-	# Enable CLKREQ#
-	register "PcieRpClkReqSupport[0]" = "1"
-	# RP 1 uses SRCCLKREQ1#
-	register "PcieRpClkReqNumber[0]" = "1"
-
-	register "usb2_ports[0]" = "USB2_PORT_LONG(OC2)"	# Type-C Port 1
-	register "usb2_ports[1]" = "USB2_PORT_LONG(OC3)"	# Type-C Port 2
-	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth
-	register "usb2_ports[4]" = "USB2_PORT_MID(OC0)"		# Type-A Port
-	register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)"	# Camera
-	register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)"	# SD
-
-	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)"	# Type-C Port 1
-	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)"	# Type-C Port 2
-	register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC0)"	# Type-A Port
-	register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# SD
-
-
-	# Must leave UART0 enabled or SD/eMMC will not work as PCI
-	register "SerialIoDevMode" = "{
-		[PchSerialIoIndexI2C0]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C1]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C2]  = PchSerialIoDisabled,
-		[PchSerialIoIndexI2C3]  = PchSerialIoDisabled,
-		[PchSerialIoIndexI2C4]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C5]  = PchSerialIoDisabled,
-		[PchSerialIoIndexSpi0]  = PchSerialIoDisabled,
-		[PchSerialIoIndexSpi1]  = PchSerialIoDisabled,
-		[PchSerialIoIndexUart0] = PchSerialIoPci,
-		[PchSerialIoIndexUart1] = PchSerialIoDisabled,
-		[PchSerialIoIndexUart2] = PchSerialIoSkipInit,
-	}"
-
-	# I2C4 is 1.8V
-	register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8"
-
-	# PL2 override 15W
-	register "tdp_pl2_override" = "15"
-
-	# Send an extra VR mailbox command for the supported MPS IMVP8 model
-	register "SendVrMbxCmd" = "1"
-
-	# TCC of 90C
-	register "tcc_offset" = "10"
-
-	# Lock Down
-	register "common_soc_config" = "{
-		.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
-	}"
-
-	device cpu_cluster 0 on
-		device lapic 0 on end
-	end
-	device domain 0 on
-		device pci 00.0 on  end # Host Bridge
-		device pci 02.0 on  end # Integrated Graphics Device
-		device pci 14.0 on  end # USB xHCI
-		device pci 14.1 off end # USB xDCI (OTG)
-		device pci 14.2 on  end # Thermal Subsystem
-		device pci 15.0 on  end # I2C #0
-		device pci 15.1 on
-			chip drivers/i2c/generic
-				register "hid" = ""ELAN0000""
-				register "desc" = ""ELAN Touchpad""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
-				register "wake" = "GPE0_DW0_05"
-				device i2c 15 on end
-			end
-		end # I2C #1
-		device pci 15.2 off end # I2C #2
-		device pci 15.3 off end # I2C #3
-		device pci 16.0 on  end # Management Engine Interface 1
-		device pci 16.1 off end # Management Engine Interface 2
-		device pci 16.2 off end # Management Engine IDE-R
-		device pci 16.3 off end # Management Engine KT Redirection
-		device pci 16.4 off end # Management Engine Interface 3
-		device pci 17.0 off end # SATA
-		device pci 19.0 on  end # UART #2
-		device pci 19.1 off end # I2C #5
-		device pci 19.2 on
-			chip drivers/i2c/nau8825
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
-				register "jkdet_enable" = "1"
-				register "jkdet_pull_enable" = "0"   # R389
-				register "jkdet_polarity" = "1"      # ActiveLow
-				register "vref_impedance" = "2"      # 125kOhm
-				register "micbias_voltage" = "6"     # 2.754
-				register "sar_threshold_num" = "4"
-				register "sar_threshold[0]" = "0x0c"
-				register "sar_threshold[1]" = "0x1c"
-				register "sar_threshold[2]" = "0x38"
-				register "sar_threshold[3]" = "0x60"
-				register "sar_hysteresis" = "1"
-				register "sar_voltage" = "0"          # VDDA
-				register "sar_compare_time" = "0"     # 500ns
-				register "sar_sampling_time" = "0"    # 2us
-				register "short_key_debounce" = "2"   # 100ms
-				register "jack_insert_debounce" = "7" # 512ms
-				register "jack_eject_debounce" = "7"  # 512ms
-				device i2c 1a on end
-			end
-			chip drivers/i2c/generic
-				register "hid" = ""INT343B""
-				register "desc" = ""SSM4567 Left Speaker Amp""
-				register "uid" = "0"
-				device i2c 34 on end
-			end
-			chip drivers/i2c/generic
-				register "hid" = ""INT343B""
-				register "desc" = ""SSM4567 Right Speaker Amp""
-				register "uid" = "1"
-				device i2c 35 on end
-			end
-		end # I2C #4
-		device pci 1c.0 on
-			chip drivers/intel/wifi
-				register "wake" = "GPE0_DW0_16"
-				device pci 00.0 on end
-			end
-		end # PCI Express Port 1
-		device pci 1c.1 off end # PCI Express Port 2
-		device pci 1c.2 off end # PCI Express Port 3
-		device pci 1c.3 off end # PCI Express Port 4
-		device pci 1c.4 off end # PCI Express Port 5
-		device pci 1c.5 off end # PCI Express Port 6
-		device pci 1c.6 off end # PCI Express Port 7
-		device pci 1c.7 off end # PCI Express Port 8
-		device pci 1d.0 off end # PCI Express Port 9
-		device pci 1d.1 off end # PCI Express Port 10
-		device pci 1d.2 off end # PCI Express Port 11
-		device pci 1d.3 off end # PCI Express Port 12
-		device pci 1e.0 on  end # UART #0
-		device pci 1e.1 off end # UART #1
-		device pci 1e.2 off end # GSPI #0
-		device pci 1e.3 off end # GSPI #1
-		device pci 1e.4 on  end # eMMC
-		device pci 1e.5 off end # SDIO
-		device pci 1e.6 off end # SDCard
-		device pci 1f.0 on
-			chip drivers/pc80/tpm
-				device pnp 0c31.0 on end
-			end
-			chip ec/google/chromeec
-				device pnp 0c09.0 on end
-			end
-		end # LPC Interface
-		device pci 1f.1 on  end # P2SB
-		device pci 1f.2 on  end # Power Management Controller
-		device pci 1f.3 on  end # Intel HDA
-		device pci 1f.4 on  end # SMBus
-		device pci 1f.5 on  end # PCH SPI
-		device pci 1f.6 off end # GbE
-	end
-end
diff --git a/src/mainboard/google/glados/variants/chell/overridetree.cb b/src/mainboard/google/glados/variants/chell/overridetree.cb
new file mode 100644
index 0000000000..c6ccd208aa
--- /dev/null
+++ b/src/mainboard/google/glados/variants/chell/overridetree.cb
@@ -0,0 +1,73 @@
+chip soc/intel/skylake
+
+	register "PmConfigSlpS4MinAssert" = "1"		# 1s
+	register "PmConfigSlpSusMinAssert" = "1"	# 500ms
+
+	register "usb2_ports[0]" = "USB2_PORT_LONG(OC2)"	# Type-C Port 1
+	register "usb2_ports[1]" = "USB2_PORT_LONG(OC3)"	# Type-C Port 2
+	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth
+	register "usb2_ports[4]" = "USB2_PORT_MID(OC0)"		# Type-A Port
+	register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)"	# Camera
+	register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)"	# SD
+
+	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)"	# Type-C Port 1
+	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)"	# Type-C Port 2
+	register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC0)"	# Type-A Port
+	register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)"	# SD
+
+	# PL2 override 15W
+	register "tdp_pl2_override" = "15"
+
+	# Send an extra VR mailbox command for the supported MPS IMVP8 model
+	register "SendVrMbxCmd" = "1"
+
+	# TCC of 90C
+	register "tcc_offset" = "10"
+
+	device domain 0 on
+		device pci 15.1 on
+			chip drivers/i2c/generic
+				register "hid" = ""ELAN0000""
+				register "desc" = ""ELAN Touchpad""
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
+				register "wake" = "GPE0_DW0_05"
+				device i2c 15 on end
+			end
+		end # I2C #1
+		device pci 19.2 on
+			chip drivers/i2c/nau8825
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
+				register "jkdet_enable" = "1"
+				register "jkdet_pull_enable" = "0"	# R389
+				register "jkdet_polarity" = "1"		# ActiveLow
+				register "vref_impedance" = "2"		# 125kOhm
+				register "micbias_voltage" = "6"	# 2.754
+				register "sar_threshold_num" = "4"
+				register "sar_threshold[0]" = "0x0c"
+				register "sar_threshold[1]" = "0x1c"
+				register "sar_threshold[2]" = "0x38"
+				register "sar_threshold[3]" = "0x60"
+				register "sar_hysteresis" = "1"
+				register "sar_voltage" = "0"		# VDDA
+				register "sar_compare_time" = "0"	# 500ns
+				register "sar_sampling_time" = "0"	# 2us
+				register "short_key_debounce" = "2"	# 100ms
+				register "jack_insert_debounce" = "7"	# 512ms
+				register "jack_eject_debounce" = "7"	# 512ms
+				device i2c 1a on end
+			end
+			chip drivers/i2c/generic
+				register "hid" = ""INT343B""
+				register "desc" = ""SSM4567 Left Speaker Amp""
+				register "uid" = "0"
+				device i2c 34 on end
+			end
+			chip drivers/i2c/generic
+				register "hid" = ""INT343B""
+				register "desc" = ""SSM4567 Right Speaker Amp""
+				register "uid" = "1"
+				device i2c 35 on end
+			end
+		end # I2C #4
+	end
+end
diff --git a/src/mainboard/google/glados/variants/glados/devicetree.cb b/src/mainboard/google/glados/variants/glados/devicetree.cb
deleted file mode 100644
index 9cd5ac986f..0000000000
--- a/src/mainboard/google/glados/variants/glados/devicetree.cb
+++ /dev/null
@@ -1,234 +0,0 @@
-chip soc/intel/skylake
-
-	register "gpu_pp_up_delay_ms"		  = "200"
-	register "gpu_pp_down_delay_ms"		  = " 50"
-	register "gpu_pp_cycle_delay_ms"	  = "500"
-	register "gpu_pp_backlight_on_delay_ms"	  = "  1"
-	register "gpu_pp_backlight_off_delay_ms"  = "200"
-
-	register "gpu_pch_backlight_pwm_hz"	  = "1000"
-
-	# Enable deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
-	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
-
-	# GPE configuration
-	# Note that GPE events called out in ASL code rely on this
-	# route. i.e. If this route changes then the affected GPE
-	# offset bits also need to be changed.
-	register "gpe0_dw0" = "GPP_B"
-	register "gpe0_dw1" = "GPP_D"
-	register "gpe0_dw2" = "GPP_E"
-
-	# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
-	register "gen1_dec" = "0x00fc0801"
-	register "gen2_dec" = "0x000c0201"
-
-	# Enable "Intel Speed Shift Technology"
-	register "speed_shift_enable" = "1"
-
-	# Enable DPTF
-	register "dptf_enable" = "1"
-
-	# FSP Configuration
-	register "ProbelessTrace" = "0"
-	register "EnableLan" = "0"
-	register "EnableSata" = "0"
-	register "SataSalpSupport" = "0"
-	register "SataMode" = "0"
-	register "SataPortsEnable[0]" = "0"
-	register "EnableAzalia" = "1"
-	register "DspEnable" = "1"
-	register "IoBufferOwnership" = "3"
-	register "EnableTraceHub" = "0"
-	register "SsicPortEnable" = "0"
-	register "SmbusEnable" = "1"
-	register "Cio2Enable" = "0"
-	register "ScsEmmcEnabled" = "1"
-	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "2"
-	register "PttSwitch" = "0"
-	register "SkipExtGfxScan" = "1"
-	register "Device4Enable" = "1"
-	register "HeciEnabled" = "0"
-	register "SaGv" = "3"
-	register "PmConfigSlpS3MinAssert" = "2"        # 50ms
-	register "PmConfigSlpS4MinAssert" = "1"        # 1s
-	register "PmConfigSlpSusMinAssert" = "1"       # 500ms
-	register "PmConfigSlpAMinAssert" = "3"         # 2s
-	register "PmTimerDisabled" = "1"
-
-	register "pirqa_routing" = "PCH_IRQ11"
-	register "pirqb_routing" = "PCH_IRQ10"
-	register "pirqc_routing" = "PCH_IRQ11"
-	register "pirqd_routing" = "PCH_IRQ11"
-	register "pirqe_routing" = "PCH_IRQ11"
-	register "pirqf_routing" = "PCH_IRQ11"
-	register "pirqg_routing" = "PCH_IRQ11"
-	register "pirqh_routing" = "PCH_IRQ11"
-
-	# Enable Root port 1
-	register "PcieRpEnable[0]" = "1"
-	# Enable CLKREQ#
-	register "PcieRpClkReqSupport[0]" = "1"
-	# RP 1 uses SRCCLKREQ1#
-	register "PcieRpClkReqNumber[0]" = "1"
-
-	register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)"   # Type-C Port (board)
-	register "usb2_ports[1]" = "USB2_PORT_MAX(OC3)"      # Type-C Port (flex)
-	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"  # Bluetooth
-	register "usb2_ports[4]" = "USB2_PORT_MID(OC0)"      # Type-A Port 1
-	register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)" # Camera
-	register "usb2_ports[8]" = "USB2_PORT_MID(OC1)"      # Type-A Port 2
-
-	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port (board)
-	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)" # Type-C Port (flex)
-	register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 1
-	register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC1)" # Type-A Port 2
-
-	# Must leave UART0 enabled or SD/eMMC will not work as PCI
-	register "SerialIoDevMode" = "{
-		[PchSerialIoIndexI2C0]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C1]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C2]  = PchSerialIoDisabled,
-		[PchSerialIoIndexI2C3]  = PchSerialIoDisabled,
-		[PchSerialIoIndexI2C4]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C5]  = PchSerialIoDisabled,
-		[PchSerialIoIndexSpi0]  = PchSerialIoDisabled,
-		[PchSerialIoIndexSpi1]  = PchSerialIoDisabled,
-		[PchSerialIoIndexUart0] = PchSerialIoPci,
-		[PchSerialIoIndexUart1] = PchSerialIoDisabled,
-		[PchSerialIoIndexUart2] = PchSerialIoSkipInit,
-	}"
-
-	# I2C4 is 1.8V
-	register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8"
-
-	# PL2 override 15W
-	register "tdp_pl2_override" = "15"
-
-	# Send an extra VR mailbox command for the supported MPS IMVP8 model
-	register "SendVrMbxCmd" = "1"
-
-	# TCC of 90C
-	register "tcc_offset" = "10"
-
-	# Lock Down
-	register "common_soc_config" = "{
-		.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
-	}"
-
-	device cpu_cluster 0 on
-		device lapic 0 on end
-	end
-	device domain 0 on
-		device pci 00.0 on  end # Host Bridge
-		device pci 02.0 on  end # Integrated Graphics Device
-		device pci 14.0 on  end # USB xHCI
-		device pci 14.1 off end # USB xDCI (OTG)
-		device pci 14.2 on  end # Thermal Subsystem
-		device pci 15.0 on
-			chip drivers/i2c/generic
-				register "hid" = ""ELAN0001""
-				register "desc" = ""ELAN Touchscreen""
-				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)"
-				device i2c 10 on end
-			end
-		end # I2C #0
-		device pci 15.1 on
-			chip drivers/i2c/generic
-				register "hid" = ""ELAN0000""
-				register "desc" = ""ELAN Touchpad""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
-				register "wake" = "GPE0_DW0_05"
-				device i2c 15 on end
-			end
-		end # I2C #1
-		device pci 15.2 off end # I2C #2
-		device pci 15.3 off end # I2C #3
-		device pci 16.0 on  end # Management Engine Interface 1
-		device pci 16.1 off end # Management Engine Interface 2
-		device pci 16.2 off end # Management Engine IDE-R
-		device pci 16.3 off end # Management Engine KT Redirection
-		device pci 16.4 off end # Management Engine Interface 3
-		device pci 17.0 off end # SATA
-		device pci 19.0 on  end # UART #2
-		device pci 19.1 off end # I2C #5
-		device pci 19.2 on
-			chip drivers/i2c/nau8825
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
-				register "jkdet_enable" = "1"
-				register "jkdet_pull_enable" = "0"   # R389
-				register "jkdet_polarity" = "1"      # ActiveLow
-				register "vref_impedance" = "2"      # 125kOhm
-				register "micbias_voltage" = "6"     # 2.754
-				register "sar_threshold_num" = "4"
-				register "sar_threshold[0]" = "0x0c"
-				register "sar_threshold[1]" = "0x1e"
-				register "sar_threshold[2]" = "0x38"
-				register "sar_threshold[3]" = "0x60"
-				register "sar_hysteresis" = "1"
-				register "sar_voltage" = "0"          # VDDA
-				register "sar_compare_time" = "0"     # 500ns
-				register "sar_sampling_time" = "0"    # 2us
-				register "short_key_debounce" = "2"   # 100ms
-				register "jack_insert_debounce" = "7" # 512ms
-				register "jack_eject_debounce" = "7"  # 512ms
-				device i2c 1a on end
-			end
-			chip drivers/i2c/generic
-				register "hid" = ""INT343B""
-				register "desc" = ""SSM4567 Left Speaker Amp""
-				register "uid" = "0"
-				device i2c 34 on end
-			end
-			chip drivers/i2c/generic
-				register "hid" = ""INT343B""
-				register "desc" = ""SSM4567 Right Speaker Amp""
-				register "uid" = "1"
-				device i2c 35 on end
-			end
-		end # I2C #4
-		device pci 1c.0 on
-			chip drivers/intel/wifi
-				register "wake" = "GPE0_DW0_16"
-				device pci 00.0 on end
-			end
-		end # PCI Express Port 1
-		device pci 1c.1 off end # PCI Express Port 2
-		device pci 1c.2 off end # PCI Express Port 3
-		device pci 1c.3 off end # PCI Express Port 4
-		device pci 1c.4 off end # PCI Express Port 5
-		device pci 1c.5 off end # PCI Express Port 6
-		device pci 1c.6 off end # PCI Express Port 7
-		device pci 1c.7 off end # PCI Express Port 8
-		device pci 1d.0 off end # PCI Express Port 9
-		device pci 1d.1 off end # PCI Express Port 10
-		device pci 1d.2 off end # PCI Express Port 11
-		device pci 1d.3 off end # PCI Express Port 12
-		device pci 1e.0 on  end # UART #0
-		device pci 1e.1 off end # UART #1
-		device pci 1e.2 off end # GSPI #0
-		device pci 1e.3 off end # GSPI #1
-		device pci 1e.4 on  end # eMMC
-		device pci 1e.5 off end # SDIO
-		device pci 1e.6 on  end # SDCard
-		device pci 1f.0 on
-			chip drivers/pc80/tpm
-				device pnp 0c31.0 on end
-			end
-			chip ec/google/chromeec
-				device pnp 0c09.0 on end
-			end
-		end # LPC Interface
-		device pci 1f.1 on  end # P2SB
-		device pci 1f.2 on  end # Power Management Controller
-		device pci 1f.3 on  end # Intel HDA
-		device pci 1f.4 on  end # SMBus
-		device pci 1f.5 on  end # PCH SPI
-		device pci 1f.6 off end # GbE
-	end
-end
diff --git a/src/mainboard/google/glados/variants/glados/overridetree.cb b/src/mainboard/google/glados/variants/glados/overridetree.cb
new file mode 100644
index 0000000000..1bc69abb17
--- /dev/null
+++ b/src/mainboard/google/glados/variants/glados/overridetree.cb
@@ -0,0 +1,84 @@
+chip soc/intel/skylake
+
+	register "ScsSdCardEnabled" = "2"
+
+	register "PmConfigSlpS4MinAssert" = "1"		# 1s
+	register "PmConfigSlpSusMinAssert" = "1"	# 500ms
+
+	register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)"	# Type-C Port (board)
+	register "usb2_ports[1]" = "USB2_PORT_MAX(OC3)"		# Type-C Port (flex)
+	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth
+	register "usb2_ports[4]" = "USB2_PORT_MID(OC0)"		# Type-A Port 1
+	register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)"	# Camera
+	register "usb2_ports[8]" = "USB2_PORT_MID(OC1)"		# Type-A Port 2
+
+	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)"	# Type-C Port (board)
+	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)"	# Type-C Port (flex)
+	register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC0)"	# Type-A Port 1
+	register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC1)"	# Type-A Port 2
+
+	# PL2 override 15W
+	register "tdp_pl2_override" = "15"
+
+	# Send an extra VR mailbox command for the supported MPS IMVP8 model
+	register "SendVrMbxCmd" = "1"
+
+	# TCC of 90C
+	register "tcc_offset" = "10"
+
+	device domain 0 on
+		device pci 15.0 on
+			chip drivers/i2c/generic
+				register "hid" = ""ELAN0001""
+				register "desc" = ""ELAN Touchscreen""
+				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)"
+				device i2c 10 on end
+			end
+		end # I2C #0
+		device pci 15.1 on
+			chip drivers/i2c/generic
+				register "hid" = ""ELAN0000""
+				register "desc" = ""ELAN Touchpad""
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
+				register "wake" = "GPE0_DW0_05"
+				device i2c 15 on end
+			end
+		end # I2C #1
+		device pci 19.2 on
+			chip drivers/i2c/nau8825
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
+				register "jkdet_enable" = "1"
+				register "jkdet_pull_enable" = "0"	# R389
+				register "jkdet_polarity" = "1"		# ActiveLow
+				register "vref_impedance" = "2"		# 125kOhm
+				register "micbias_voltage" = "6"	# 2.754
+				register "sar_threshold_num" = "4"
+				register "sar_threshold[0]" = "0x0c"
+				register "sar_threshold[1]" = "0x1e"
+				register "sar_threshold[2]" = "0x38"
+				register "sar_threshold[3]" = "0x60"
+				register "sar_hysteresis" = "1"
+				register "sar_voltage" = "0"		# VDDA
+				register "sar_compare_time" = "0"	# 500ns
+				register "sar_sampling_time" = "0"	# 2us
+				register "short_key_debounce" = "2"	# 100ms
+				register "jack_insert_debounce" = "7"	# 512ms
+				register "jack_eject_debounce" = "7"	# 512ms
+				device i2c 1a on end
+			end
+			chip drivers/i2c/generic
+				register "hid" = ""INT343B""
+				register "desc" = ""SSM4567 Left Speaker Amp""
+				register "uid" = "0"
+				device i2c 34 on end
+			end
+			chip drivers/i2c/generic
+				register "hid" = ""INT343B""
+				register "desc" = ""SSM4567 Right Speaker Amp""
+				register "uid" = "1"
+				device i2c 35 on end
+			end
+		end # I2C #4
+		device pci 1e.6 on  end # SDCard
+	end
+end
diff --git a/src/mainboard/google/glados/variants/lars/overridetree.cb b/src/mainboard/google/glados/variants/lars/overridetree.cb
new file mode 100644
index 0000000000..ce32b6b0c9
--- /dev/null
+++ b/src/mainboard/google/glados/variants/lars/overridetree.cb
@@ -0,0 +1,67 @@
+chip soc/intel/skylake
+
+	register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)"	# Type-C Port 1
+	register "usb2_ports[1]" = "USB2_PORT_FLEX(OC_SKIP)"	# Camera
+	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth
+	register "usb2_ports[4]" = "USB2_PORT_MID(OC2)"		# Type-A Port (card)
+	register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)"	# SD
+	register "usb2_ports[8]" = "USB2_PORT_LONG(OC3)"	# Type-A Port (board)
+
+	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)"	# Type-C Port 1
+	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # SD
+	register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)"	# Type-A Port (card)
+	register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)"	# Type-A Port (board)
+
+	device domain 0 on
+		device pci 15.0 on
+			chip drivers/i2c/generic
+				register "hid" = ""ELAN0001""
+				register "desc" = ""ELAN Touchscreen""
+				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)"
+				device i2c 10 on end
+			end
+		end # I2C #0
+		device pci 15.1 on
+			chip drivers/i2c/generic
+				register "hid" = ""ELAN0000""
+				register "desc" = ""ELAN Touchpad""
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
+				register "wake" = "GPE0_DW0_05"
+				device i2c 15 on end
+			end
+		end # I2C #1
+		device pci 19.2 on
+			chip drivers/i2c/nau8825
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
+				register "jkdet_enable" = "1"
+				register "jkdet_pull_enable" = "1"
+				register "jkdet_pull_up" = "1"
+				register "jkdet_polarity" = "1"		# ActiveLow
+				register "vref_impedance" = "2"		# 125kOhm
+				register "micbias_voltage" = "6"	# 2.754
+				register "sar_threshold_num" = "4"
+				register "sar_threshold[0]" = "0x08"
+				register "sar_threshold[1]" = "0x12"
+				register "sar_threshold[2]" = "0x26"
+				register "sar_threshold[3]" = "0x73"
+				register "sar_hysteresis" = "0"
+				register "sar_voltage" = "6"
+				register "sar_compare_time" = "1"	# 1us
+				register "sar_sampling_time" = "1"	# 4us
+				register "short_key_debounce" = "3"	# 30ms
+				register "jack_insert_debounce" = "7"	# 512ms
+				register "jack_eject_debounce" = "0"
+				device i2c 1a on end
+			end
+		end # I2C #4
+		device pci 1e.6 off  end # SDCard
+		device pci 1f.3 on
+			chip drivers/generic/max98357a
+				register "hid" = ""MX98357A""
+				register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B2)"
+				register "sdmode_delay" = "5"
+				device generic 0 on end
+			end
+		end # Intel HDA
+	end
+end
diff --git a/src/mainboard/google/glados/variants/sentry/devicetree.cb b/src/mainboard/google/glados/variants/sentry/devicetree.cb
deleted file mode 100644
index 502aad04ea..0000000000
--- a/src/mainboard/google/glados/variants/sentry/devicetree.cb
+++ /dev/null
@@ -1,249 +0,0 @@
-chip soc/intel/skylake
-
-	register "gpu_pp_up_delay_ms"		  = "200"
-	register "gpu_pp_down_delay_ms"		  = " 50"
-	register "gpu_pp_cycle_delay_ms"	  = "500"
-	register "gpu_pp_backlight_on_delay_ms"	  = "  1"
-	register "gpu_pp_backlight_off_delay_ms"  = "200"
-
-	register "gpu_pch_backlight_pwm_hz"	  = "1000"
-
-	# Enable deep Sx states
-	register "deep_s3_enable_ac" = "0"
-	register "deep_s3_enable_dc" = "0"
-	register "deep_s5_enable_ac" = "1"
-	register "deep_s5_enable_dc" = "1"
-	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
-
-	# GPE configuration
-	# Note that GPE events called out in ASL code rely on this
-	# route. i.e. If this route changes then the affected GPE
-	# offset bits also need to be changed.
-	register "gpe0_dw0" = "GPP_B"
-	register "gpe0_dw1" = "GPP_D"
-	register "gpe0_dw2" = "GPP_E"
-
-	# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
-	register "gen1_dec" = "0x00fc0801"
-	register "gen2_dec" = "0x000c0201"
-
-	# Enable "Intel Speed Shift Technology"
-	register "speed_shift_enable" = "1"
-
-	# Enable DPTF
-	register "dptf_enable" = "1"
-
-	# FSP Configuration
-	register "ProbelessTrace" = "0"
-	register "EnableLan" = "0"
-	register "EnableSata" = "0"
-	register "SataSalpSupport" = "0"
-	register "SataMode" = "0"
-	register "SataPortsEnable[0]" = "0"
-	register "EnableAzalia" = "1"
-	register "DspEnable" = "1"
-	register "IoBufferOwnership" = "3"
-	register "EnableTraceHub" = "0"
-	register "SsicPortEnable" = "0"
-	register "SmbusEnable" = "1"
-	register "Cio2Enable" = "0"
-	register "ScsEmmcEnabled" = "1"
-	register "ScsEmmcHs400Enabled" = "1"
-	register "ScsSdCardEnabled" = "2"
-	register "PttSwitch" = "0"
-	register "SkipExtGfxScan" = "1"
-	register "Device4Enable" = "1"
-	register "HeciEnabled" = "0"
-	register "SaGv" = "3"
-	register "PmConfigSlpS3MinAssert" = "2"        # 50ms
-	register "PmConfigSlpS4MinAssert" = "4"        # 4s
-	register "PmConfigSlpSusMinAssert" = "3"       # 4s
-	register "PmConfigSlpAMinAssert" = "3"         # 2s
-	register "PmTimerDisabled" = "1"
-
-	register "pirqa_routing" = "PCH_IRQ11"
-	register "pirqb_routing" = "PCH_IRQ10"
-	register "pirqc_routing" = "PCH_IRQ11"
-	register "pirqd_routing" = "PCH_IRQ11"
-	register "pirqe_routing" = "PCH_IRQ11"
-	register "pirqf_routing" = "PCH_IRQ11"
-	register "pirqg_routing" = "PCH_IRQ11"
-	register "pirqh_routing" = "PCH_IRQ11"
-
-	# Enable Root port 1
-	register "PcieRpEnable[0]" = "1"
-	# Enable CLKREQ#
-	register "PcieRpClkReqSupport[0]" = "1"
-	# RP 1 uses SRCCLKREQ1#
-	register "PcieRpClkReqNumber[0]" = "1"
-
-	register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)"	# Type-C Port 1
-	register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC1)"	# Type-C Port 2
-	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth
-	register "usb2_ports[4]" = "USB2_PORT_MID(OC2)"		# Type-A Port (card)
-	register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)"	# Camera
-	register "usb2_ports[8]" = "USB2_PORT_LONG(OC3)"	# Type-A Port (board)
-
-	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-C Port 1
-	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-C Port 2
-	register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Port (card)
-	register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port (board)
-
-	# Must leave UART0 enabled or SD/eMMC will not work as PCI
-	register "SerialIoDevMode" = "{
-		[PchSerialIoIndexI2C0]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C1]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C2]  = PchSerialIoDisabled,
-		[PchSerialIoIndexI2C3]  = PchSerialIoDisabled,
-		[PchSerialIoIndexI2C4]  = PchSerialIoPci,
-		[PchSerialIoIndexI2C5]  = PchSerialIoDisabled,
-		[PchSerialIoIndexSpi0]  = PchSerialIoDisabled,
-		[PchSerialIoIndexSpi1]  = PchSerialIoDisabled,
-		[PchSerialIoIndexUart0] = PchSerialIoPci,
-		[PchSerialIoIndexUart1] = PchSerialIoDisabled,
-		[PchSerialIoIndexUart2] = PchSerialIoSkipInit,
-	}"
-
-	# I2C0 is 3.3V
-	register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
-
-	# I2C4 is 1.8V
-	register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8"
-
-	# PL2 override 25W
-	register "tdp_pl2_override" = "25"
-
-	# Send an extra VR mailbox command for the PS4 exit issue
-	register "SendVrMbxCmd" = "2"
-
-	# Use default SD card detect GPIO configuration
-	register "sdcard_cd_gpio_default" = "GPP_A7"
-
-	# Lock Down
-	register "common_soc_config" = "{
-		.chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT,
-	}"
-
-	device cpu_cluster 0 on
-		device lapic 0 on end
-	end
-	device domain 0 on
-		device pci 00.0 on  end # Host Bridge
-		device pci 02.0 on  end # Integrated Graphics Device
-		device pci 14.0 on  end # USB xHCI
-		device pci 14.1 off end # USB xDCI (OTG)
-		device pci 14.2 on  end # Thermal Subsystem
-		device pci 15.0 on
-			chip drivers/i2c/generic
-				register "hid" = ""RAYD0001""
-				register "desc" = ""Raydium Touchscreen""
-				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)"
-				device i2c 39 on end
-			end
-		end # I2C #0
-		device pci 15.1 on
-			chip drivers/i2c/generic
-				register "hid" = ""ELAN0000""
-				register "desc" = ""ELAN Touchpad""
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
-				register "wake" = "GPE0_DW0_05"
-				device i2c 15 on end
-			end
-		end # I2C #1
-		device pci 15.2 off end # I2C #2
-		device pci 15.3 off end # I2C #3
-		device pci 16.0 on  end # Management Engine Interface 1
-		device pci 16.1 off end # Management Engine Interface 2
-		device pci 16.2 off end # Management Engine IDE-R
-		device pci 16.3 off end # Management Engine KT Redirection
-		device pci 16.4 off end # Management Engine Interface 3
-		device pci 17.0 off end # SATA
-		device pci 19.0 on  end # UART #2
-		device pci 19.1 off end # I2C #5
-		device pci 19.2 on
-			chip drivers/i2c/nau8825
-				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
-				register "jkdet_enable" = "1"
-				register "jkdet_pull_enable" = "1"
-				register "jkdet_pull_up" = "1"
-				register "jkdet_polarity" = "1"      # ActiveLow
-				register "vref_impedance" = "2"      # 125kOhm
-				register "micbias_voltage" = "6"     # 2.754
-				register "sar_threshold_num" = "4"
-				register "sar_threshold[0]" = "0x08"
-				register "sar_threshold[1]" = "0x12"
-				register "sar_threshold[2]" = "0x26"
-				register "sar_threshold[3]" = "0x73"
-				register "sar_hysteresis" = "0"
-				register "sar_voltage" = "6"
-				register "sar_compare_time" = "1"     # 1us
-				register "sar_sampling_time" = "1"    # 4us
-				register "short_key_debounce" = "3"   # 30ms
-				register "jack_insert_debounce" = "7" # 512ms
-				register "jack_eject_debounce" = "0"
-				device i2c 1a on end
-			end
-			chip drivers/i2c/generic
-				register "hid" = ""INT343B""
-				register "desc" = ""SSM4567 Left Speaker Amp""
-				register "uid" = "0"
-				register "device_present_gpio" = "GPP_E3"
-				device i2c 34 on end
-			end
-			chip drivers/i2c/generic
-				register "hid" = ""INT343B""
-				register "desc" = ""SSM4567 Right Speaker Amp""
-				register "uid" = "1"
-				register "device_present_gpio" = "GPP_E3"
-				device i2c 35 on end
-			end
-		end # I2C #4
-		device pci 1c.0 on
-			chip drivers/intel/wifi
-				register "wake" = "GPE0_DW0_16"
-				device pci 00.0 on end
-			end
-		end # PCI Express Port 1
-		device pci 1c.1 off end # PCI Express Port 2
-		device pci 1c.2 off end # PCI Express Port 3
-		device pci 1c.3 off end # PCI Express Port 4
-		device pci 1c.4 off end # PCI Express Port 5
-		device pci 1c.5 off end # PCI Express Port 6
-		device pci 1c.6 off end # PCI Express Port 7
-		device pci 1c.7 off end # PCI Express Port 8
-		device pci 1d.0 off end # PCI Express Port 9
-		device pci 1d.1 off end # PCI Express Port 10
-		device pci 1d.2 off end # PCI Express Port 11
-		device pci 1d.3 off end # PCI Express Port 12
-		device pci 1e.0 on  end # UART #0
-		device pci 1e.1 off end # UART #1
-		device pci 1e.2 off end # GSPI #0
-		device pci 1e.3 off end # GSPI #1
-		device pci 1e.4 on  end # eMMC
-		device pci 1e.5 off end # SDIO
-		device pci 1e.6 on  end # SDCard
-		device pci 1f.0 on
-			chip drivers/pc80/tpm
-				device pnp 0c31.0 on end
-			end
-			chip ec/google/chromeec
-				device pnp 0c09.0 on end
-			end
-		end # LPC Interface
-		device pci 1f.1 on  end # P2SB
-		device pci 1f.2 on  end # Power Management Controller
-		device pci 1f.3 on
-			chip drivers/generic/max98357a
-				register "hid" = ""MX98357A""
-				register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)"
-				register "device_present_gpio" = "GPP_E3"
-				register "device_present_gpio_invert" = "1"
-				register "sdmode_delay" = "5"
-				device generic 0 on end
-			end
-		end # Intel HDA
-		device pci 1f.4 on  end # SMBus
-		device pci 1f.5 on  end # PCH SPI
-		device pci 1f.6 off end # GbE
-	end
-end
diff --git a/src/mainboard/google/glados/variants/sentry/overridetree.cb b/src/mainboard/google/glados/variants/sentry/overridetree.cb
new file mode 100644
index 0000000000..08d3dd3aba
--- /dev/null
+++ b/src/mainboard/google/glados/variants/sentry/overridetree.cb
@@ -0,0 +1,91 @@
+chip soc/intel/skylake
+
+	register "ScsSdCardEnabled" = "2"
+
+	register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)"	# Type-C Port 1
+	register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC1)"	# Type-C Port 2
+	register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth
+	register "usb2_ports[4]" = "USB2_PORT_MID(OC2)"		# Type-A Port (card)
+	register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)"	# Camera
+	register "usb2_ports[8]" = "USB2_PORT_LONG(OC3)"	# Type-A Port (board)
+
+	register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-C Port 1
+	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-C Port 2
+	register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Port (card)
+	register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port (board)
+
+	# I2C0 is 3.3V
+	register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
+
+	# Use default SD card detect GPIO configuration
+	register "sdcard_cd_gpio_default" = "GPP_A7"
+
+	device domain 0 on
+		device pci 15.0 on
+			chip drivers/i2c/generic
+				register "hid" = ""RAYD0001""
+				register "desc" = ""Raydium Touchscreen""
+				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)"
+				device i2c 39 on end
+			end
+		end # I2C #0
+		device pci 15.1 on
+			chip drivers/i2c/generic
+				register "hid" = ""ELAN0000""
+				register "desc" = ""ELAN Touchpad""
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
+				register "wake" = "GPE0_DW0_05"
+				device i2c 15 on end
+			end
+		end # I2C #1
+		device pci 19.2 on
+			chip drivers/i2c/nau8825
+				register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F10_IRQ)"
+				register "jkdet_enable" = "1"
+				register "jkdet_pull_enable" = "1"
+				register "jkdet_pull_up" = "1"
+				register "jkdet_polarity" = "1"		# ActiveLow
+				register "vref_impedance" = "2"		# 125kOhm
+				register "micbias_voltage" = "6"	# 2.754
+				register "sar_threshold_num" = "4"
+				register "sar_threshold[0]" = "0x08"
+				register "sar_threshold[1]" = "0x12"
+				register "sar_threshold[2]" = "0x26"
+				register "sar_threshold[3]" = "0x73"
+				register "sar_hysteresis" = "0"
+				register "sar_voltage" = "6"
+				register "sar_compare_time" = "1"	# 1us
+				register "sar_sampling_time" = "1"	# 4us
+				register "short_key_debounce" = "3"	# 30ms
+				register "jack_insert_debounce" = "7"	# 512ms
+				register "jack_eject_debounce" = "0"
+				device i2c 1a on end
+			end
+			chip drivers/i2c/generic
+				register "hid" = ""INT343B""
+				register "desc" = ""SSM4567 Left Speaker Amp""
+				register "uid" = "0"
+				register "device_present_gpio" = "GPP_E3"
+				device i2c 34 on end
+			end
+			chip drivers/i2c/generic
+				register "hid" = ""INT343B""
+				register "desc" = ""SSM4567 Right Speaker Amp""
+				register "uid" = "1"
+				register "device_present_gpio" = "GPP_E3"
+				device i2c 35 on end
+			end
+		end # I2C #4
+		device pci 1e.6 on  end # SDCard
+		device pci 1f.3 on
+			chip drivers/generic/max98357a
+				register "hid" = ""MX98357A""
+				register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E3)"
+				register "device_present_gpio" = "GPP_E3"
+				register "device_present_gpio_invert" = "1"
+				register "sdmode_delay" = "5"
+				device generic 0 on end
+			end
+		end # Intel HDA
+	end
+end