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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2018-10-10 09:23:57 +0200 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2018-10-11 00:58:31 +0000 |
| commit | 1e69b0a86347efadfed0d6dca0adf40a15695ecb (patch) | |
| tree | f2a64551cc4c24a1586f5ac5a73731373d55e2b8 /src/mainboard | |
| parent | 99d258afcbb72c187c6aed6be3a0df6aac35722f (diff) | |
| download | coreboot-1e69b0a86347efadfed0d6dca0adf40a15695ecb.tar.xz | |
mb/cavium/cn8100_sff_evb: Only expose two UARTs
Only two UARTs are connected to the FTDI UART USB chip.
Change-Id: Id5ae7266ce44c9f64c7f7aeaf23c49122041f47a
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/28986
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/cavium/cn8100_sff_evb/devicetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/cavium/cn8100_sff_evb/devicetree.cb b/src/mainboard/cavium/cn8100_sff_evb/devicetree.cb index 3398e9a42c..00be155fca 100644 --- a/src/mainboard/cavium/cn8100_sff_evb/devicetree.cb +++ b/src/mainboard/cavium/cn8100_sff_evb/devicetree.cb @@ -93,11 +93,11 @@ chip soc/cavium/cn81xx end chip soc/cavium/common/pci register "secure" = "1" - device pci 08.2 on end # UUA2 + device pci 08.2 off end # UUA2 end chip soc/cavium/common/pci register "secure" = "1" - device pci 08.3 on end # UUA3 + device pci 08.3 off end # UUA3 end chip soc/cavium/common/pci register "secure" = "1" |