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authorpeichao.wang <peichao.wang@bitland.corp-partner.google.com>2018-09-12 13:55:46 +0800
committerAaron Durbin <adurbin@chromium.org>2018-09-14 08:26:04 +0000
commit211ceb5976e06cd85ca1f65d7dea116a7d92d451 (patch)
tree98d9acd7222cef0de64ab52e2165cba46fde5187 /src/mainboard
parent75a62e76486f63f6dadb5492c205570ace81e9d5 (diff)
downloadcoreboot-211ceb5976e06cd85ca1f65d7dea116a7d92d451.tar.xz
mb/google/octopus: fetch DRAM part number from CBI for phaser after DVT phase
This modification for DVT build and use CBI method enable all memory particles. BUG=b:112870780 TEST=verify it under the EVT unit and pre-test EVT unit(rework RAM ID follow the proposal) respectively. Change-Id: I488a0652ba348eff9a6d8591b0cfa6ed4fe808aa Signed-off-by: peichao.wang <peichao.wang@bitland.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/28579 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/octopus/Kconfig3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/google/octopus/Kconfig b/src/mainboard/google/octopus/Kconfig
index 3ed88bd804..0ed6ed4cfc 100644
--- a/src/mainboard/google/octopus/Kconfig
+++ b/src/mainboard/google/octopus/Kconfig
@@ -110,6 +110,7 @@ config TPM_TIS_ACPI_INTERRUPT
config DRAM_PART_NUM_IN_CBI
bool
+ default y if BOARD_GOOGLE_PHASER
config DRAM_PART_NUM_ALWAYS_IN_CBI
bool
@@ -120,7 +121,7 @@ config DRAM_PART_IN_CBI_BOARD_ID_MIN
depends on DRAM_PART_NUM_IN_CBI && !DRAM_PART_NUM_ALWAYS_IN_CBI
default 255 if BOARD_GOOGLE_YORP
default 255 if BOARD_GOOGLE_BIP
- default 9 if BOARD_GOOGLE_PHASER
+ default 2 if BOARD_GOOGLE_PHASER
default 9 if BOARD_GOOGLE_FLEEX
default 9 if BOARD_GOOGLE_BOBBA
default 9 if BOARD_GOOGLE_MEEP