diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2018-01-29 12:02:41 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-02-06 15:19:37 +0000 |
| commit | 25874b86c311a836e93ab505ee552d154a441f23 (patch) | |
| tree | 51112d616543fd8c72edee18f5ce09b59b009159 /src/mainboard | |
| parent | 74ea48efb30f6f72a7a46b352170455c0a33391d (diff) | |
| download | coreboot-25874b86c311a836e93ab505ee552d154a441f23.tar.xz | |
mb/google/eve: Enable HotPlug on PCIe root port for WiFi
Enable HotPlug for the PCIe root port that the WiFi device
is on so the OS can re-train the link without needing a reboot
if it goes down unexpectedly at runtime.
BUG=b:72417777
TEST=enable HotPlug on Eve Root Port 0 (WiFi) and check in
linux that it is identified as a HotPlug capable root port.
Change-Id: Id2b7fc92c8c9128f0e28102eb5991bda7fbf6799
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/23512
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/eve/devicetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 2880066873..2e62f41fbb 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -146,6 +146,7 @@ chip soc/intel/skylake register "PcieRpClkReqNumber[0]" = "1" register "PcieRpAdvancedErrorReporting[0]" = "1" register "PcieRpLtrEnable[0]" = "1" + register "PcieRpHotPlug[0]" = "1" #RP 1 uses CLK SRC 1 register "PcieRpClkSrcNumber[0]" = "1" |