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authorhuang lin <hl@rock-chips.com>2014-09-19 14:51:52 +0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-10 20:50:53 +0200
commit40f558e8f4f77ab70a8a2eb9bdfa850e362cb553 (patch)
tree6ef4fd3fca8bbf8f0e07070b224ba29dccec8021 /src/mainboard
parent1c8f2a6f968bec72a7060ba264f44fbea96d68e9 (diff)
downloadcoreboot-40f558e8f4f77ab70a8a2eb9bdfa850e362cb553.tar.xz
rockchip: support display
Implement VOP and eDP drivers, vop and edp clock configuration, framebuffer allocation and display configuration logic. The eDP driver reads panel EDID to determine panel dimensions and the pixel clock used by the VOP. The pixel clock is generating using the NPLL. BUG=chrome-os-partner:31897 TEST=Booted Veyron Pinky and display normal BRANCH=None Change-Id: I01b5c347a3433a108806aec61aa3a875cab8c129 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e4f863b0b57f2f5293ea8015db86cf7f8acc5853 Original-Change-Id: I61214f55e96bc1dcda9b0f700e5db11e49e5e533 Original-Signed-off-by: huang lin <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/219050 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9553 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/veyron_jerry/devicetree.cb33
-rw-r--r--src/mainboard/google/veyron_jerry/mainboard.c12
-rw-r--r--src/mainboard/google/veyron_pinky/devicetree.cb33
-rw-r--r--src/mainboard/google/veyron_pinky/mainboard.c20
4 files changed, 30 insertions, 68 deletions
diff --git a/src/mainboard/google/veyron_jerry/devicetree.cb b/src/mainboard/google/veyron_jerry/devicetree.cb
index 0acbae9e18..be0e58c86d 100644
--- a/src/mainboard/google/veyron_jerry/devicetree.cb
+++ b/src/mainboard/google/veyron_jerry/devicetree.cb
@@ -20,30 +20,11 @@
# TODO fill with Versatile Express board data in QEMU.
chip soc/rockchip/rk3288
device cpu_cluster 0 on end
- #SCREEN_RGB
- register "screen_type" = "2"
- #LVDS_8BIT_2
- register "lvds_format" = "1"
- #OUT_D888_P666
- register "out_face" = "33"
- register "clock_frequency" = "71000000"
- register "hactive" = "1280"
- register "vactive" = "800"
- register "hback_porch" = "100"
- register "hfront_porch" = "18"
- register "vback_porch" = "8"
- register "vfront_porch" = "6"
- register "hsync_len" = "10"
- register "vsync_len" = "2"
- register "hsync_active" = "0"
- register "vsync_active" = "0"
- register "de_active" = "0"
- register "pixelclk_active" = "0"
- register "swap_rb" = "0"
- register "swap_rg" = "0"
- register "swap_gb" = "0"
- #LCD_EN_GPIO:GPIO7_A3
- register "lcd_en_gpio" = "0xff7e0004"
- #LCD_CS_GPIO:GPIO7_A4
- register "lcd_cs_gpio" = "0xff7e0005"
+ register "vop_id" = "1"
+ register "framebuffer_bits_per_pixel" = "16"
+ register "lcd_bl_pwm_gpio" = "GPIO(7, A, 0)"
+ register "lcd_bl_en_gpio" = "GPIO(7, A, 2)"
+ register "lcd_power_on_udelay" = "200000"
+ register "bl_power_on_udelay" = "1000"
+ register "bl_pwm_to_enable_udelay" = "1000"
end
diff --git a/src/mainboard/google/veyron_jerry/mainboard.c b/src/mainboard/google/veyron_jerry/mainboard.c
index c15c765cf4..1c7dc7f5ad 100644
--- a/src/mainboard/google/veyron_jerry/mainboard.c
+++ b/src/mainboard/google/veyron_jerry/mainboard.c
@@ -82,16 +82,16 @@ static void configure_codec(void)
rkclk_configure_i2s(12288000);
}
-static void configure_lcd(void)
+static void configure_vop(void)
{
writel(IOMUX_LCDC, &rk3288_grf->iomux_lcdc);
+ /* lcdc(vop) iodomain select 1.8V */
+ writel(RK_SETBITS(1 << 0), &rk3288_grf->io_vsel);
+
rk808_configure_switch(PMIC_BUS, 2, 1); /* VCC18_LCD */
- rk808_configure_ldo(PMIC_BUS, 7, 2500); /* VCC10_LCD_PWREN_H */
+ rk808_configure_ldo(PMIC_BUS, 7, 2500); /* VCC10_LCD_PWREN_H */
rk808_configure_switch(PMIC_BUS, 1, 1); /* VCC33_LCD */
-
- gpio_output(GPIO(7, A, 0), 0); /* LCDC_BL */
- gpio_output(GPIO(7, A, 2), 1); /* BL_EN */
}
static void mainboard_init(device_t dev)
@@ -106,7 +106,7 @@ static void mainboard_init(device_t dev)
configure_sdmmc();
configure_emmc();
configure_codec();
- configure_lcd();
+ configure_vop();
}
static void mainboard_enable(device_t dev)
diff --git a/src/mainboard/google/veyron_pinky/devicetree.cb b/src/mainboard/google/veyron_pinky/devicetree.cb
index 0acbae9e18..be0e58c86d 100644
--- a/src/mainboard/google/veyron_pinky/devicetree.cb
+++ b/src/mainboard/google/veyron_pinky/devicetree.cb
@@ -20,30 +20,11 @@
# TODO fill with Versatile Express board data in QEMU.
chip soc/rockchip/rk3288
device cpu_cluster 0 on end
- #SCREEN_RGB
- register "screen_type" = "2"
- #LVDS_8BIT_2
- register "lvds_format" = "1"
- #OUT_D888_P666
- register "out_face" = "33"
- register "clock_frequency" = "71000000"
- register "hactive" = "1280"
- register "vactive" = "800"
- register "hback_porch" = "100"
- register "hfront_porch" = "18"
- register "vback_porch" = "8"
- register "vfront_porch" = "6"
- register "hsync_len" = "10"
- register "vsync_len" = "2"
- register "hsync_active" = "0"
- register "vsync_active" = "0"
- register "de_active" = "0"
- register "pixelclk_active" = "0"
- register "swap_rb" = "0"
- register "swap_rg" = "0"
- register "swap_gb" = "0"
- #LCD_EN_GPIO:GPIO7_A3
- register "lcd_en_gpio" = "0xff7e0004"
- #LCD_CS_GPIO:GPIO7_A4
- register "lcd_cs_gpio" = "0xff7e0005"
+ register "vop_id" = "1"
+ register "framebuffer_bits_per_pixel" = "16"
+ register "lcd_bl_pwm_gpio" = "GPIO(7, A, 0)"
+ register "lcd_bl_en_gpio" = "GPIO(7, A, 2)"
+ register "lcd_power_on_udelay" = "200000"
+ register "bl_power_on_udelay" = "1000"
+ register "bl_pwm_to_enable_udelay" = "1000"
end
diff --git a/src/mainboard/google/veyron_pinky/mainboard.c b/src/mainboard/google/veyron_pinky/mainboard.c
index 2a887497b0..4bf1e088b6 100644
--- a/src/mainboard/google/veyron_pinky/mainboard.c
+++ b/src/mainboard/google/veyron_pinky/mainboard.c
@@ -120,25 +120,25 @@ static void configure_codec(void)
rkclk_configure_i2s(12288000);
}
-static void configure_lcd(void)
+static void configure_vop(void)
{
writel(IOMUX_LCDC, &rk3288_grf->iomux_lcdc);
+ /* lcdc(vop) iodomain select 1.8V */
+ writel(RK_SETBITS(1 << 0), &rk3288_grf->io_vsel);
+
switch (board_id()) {
case 0:
- rk808_configure_ldo(PMIC_BUS, 4, 1800); /* VCC18_LCD */
- rk808_configure_ldo(PMIC_BUS, 6, 1000); /* VCC10_LCD */
- gpio_output(GPIO(7, B, 7), 1); /* LCD_EN */
+ rk808_configure_ldo(PMIC_BUS, 4, 1800); /* VCC18_LCD */
+ rk808_configure_ldo(PMIC_BUS, 6, 1000); /* VCC10_LCD */
+ gpio_output(GPIO(7, B, 7), 1); /* LCD_EN */
break;
default:
- rk808_configure_switch(PMIC_BUS, 2, 1); /* VCC18_LCD */
+ rk808_configure_switch(PMIC_BUS, 2, 1); /* VCC18_LCD */
rk808_configure_ldo(PMIC_BUS, 7, 2500); /* VCC10_LCD_PWREN_H */
- rk808_configure_switch(PMIC_BUS, 1, 1); /* VCC33_LCD */
+ rk808_configure_switch(PMIC_BUS, 1, 1); /* VCC33_LCD */
break;
}
-
- gpio_output(GPIO(7, A, 0), 0); /* LCDC_BL */
- gpio_output(GPIO(7, A, 2), 1); /* BL_EN */
}
static void mainboard_init(device_t dev)
@@ -153,7 +153,7 @@ static void mainboard_init(device_t dev)
configure_sdmmc();
configure_emmc();
configure_codec();
- configure_lcd();
+ configure_vop();
}
static void mainboard_enable(device_t dev)