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authorMichał Żygowski <michal.zygowski@3mdeb.com>2020-03-19 16:12:42 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-23 19:29:54 +0000
commit4629830b73d331d2130e6bf3e49acd24f2bab3f2 (patch)
treed86726856696c75e1c321f1b403ad50b92736532 /src/mainboard
parent3fbd2af112bb428e7894a03cd24ffeae9ace1763 (diff)
downloadcoreboot-4629830b73d331d2130e6bf3e49acd24f2bab3f2.tar.xz
mb/pcengines/apu2/mptable.c: add GNB IOAPIC to MP Table
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I385339761b3e1b5dcadb67b8ca29b1518c2db408 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39702 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/pcengines/apu2/mptable.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/pcengines/apu2/mptable.c b/src/mainboard/pcengines/apu2/mptable.c
index 36bd340fb0..747e777dca 100644
--- a/src/mainboard/pcengines/apu2/mptable.c
+++ b/src/mainboard/pcengines/apu2/mptable.c
@@ -15,6 +15,7 @@
#include <arch/smp/mpspec.h>
#include <arch/ioapic.h>
#include <stdint.h>
+#include <northbridge/amd/pi/nb_common.h>
#include <southbridge/amd/common/amd_pci_util.h>
static void *smp_write_config_table(void *v)
@@ -50,6 +51,11 @@ static void *smp_write_config_table(void *v)
smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
+ ioapic_id = (io_apic_read((void *)IO_APIC2_ADDR, 0x00) >> 24);
+ ioapic_ver = (io_apic_read((void *)IO_APIC2_ADDR, 0x01) & 0xFF);
+
+ smp_write_ioapic(mc, ioapic_id, ioapic_ver, (void *)IO_APIC2_ADDR);
+
/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
#define IO_LOCAL_INT(type, intr, apicid, pin) \
smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin));