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author | Matt DeVillier <matt.devillier@puri.sm> | 2020-11-04 14:50:40 -0600 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-09 07:47:22 +0000 |
commit | 4d4256e499e850a724d228d2e676c0f32af67093 (patch) | |
tree | 533919e8fc63ba03d7fd16195092417c05d0dced /src/mainboard | |
parent | 0ee920bf6439d5f404a77971a5f7e3fa04339924 (diff) | |
download | coreboot-4d4256e499e850a724d228d2e676c0f32af67093.tar.xz |
mb/purism/librem_mini: Adjust GPIO pad config per schematics
- set pads GPP_B6/B8 for PCIe CLK_REQ lines
- set pad GPP_B14 to speaker output
- adjust comment for GPP_C22 / USB3_P1_PWREN
- set pad GPP_E4 to NF1 / SATA_DEVSLP0
- set pads GPP_E9/E10 to USB2_OC0#/USB2_OC1#
Change-Id: I8bf8af620370ec2d4c864e513db5d710a9c65d27
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47220
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c b/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c index b35ee4c64d..8fa4ac57ec 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c +++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c @@ -99,14 +99,14 @@ static const struct pad_config gpio_table[] = { /* GPP_B5 - NC */ PAD_NC(GPP_B5, NONE), - /* GPP_B6 - NC */ - PAD_NC(GPP_B6, NONE), + /* GPP_B6 - SRCCLKREQ1# / SSD_CLK_REQ# */ + PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), /* GPP_B7 - NC */ PAD_NC(GPP_B7, NONE), - /* GPP_B8 - NC */ - PAD_NC(GPP_B8, NONE), + /* GPP_B8 - SRCCLKREQ3# / LAN2_CLK_REQ# */ + PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), /* GPP_B9 - NC */ PAD_NC(GPP_B9, NONE), @@ -123,8 +123,8 @@ static const struct pad_config gpio_table[] = { /* GPP_B13 - PLTRST# */ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), - /* GPP_B14 - GPIO */ - PAD_CFG_GPO(GPP_B14, 1, PLTRST), + /* GPP_B14 - SPKR */ + PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1), /* GPP_B15 - NC */ PAD_NC(GPP_B15, NONE), @@ -507,7 +507,7 @@ static const struct pad_config gpio_table[] = { /* GPP_C21 - NC */ PAD_NC(GPP_C21, NONE), - /* GPP_C22 - GPIO */ + /* GPP_C22 - USB3_P1_PWREN */ PAD_CFG_GPO(GPP_C22, 1, PLTRST), /* GPP_C23 - NC */ @@ -527,8 +527,8 @@ static const struct pad_config gpio_table[] = { /* GPP_E3 - NC */ PAD_NC(GPP_E3, UP_20K), - /* GPP_E4 - GPIO */ - PAD_CFG_GPO(GPP_E4, 1, PLTRST), + /* GPP_E4 - SATA_DEVSLP0 */ + PAD_CFG_NF(GPP_E4, NONE, PLTRST, NF1), /* GPP_E5 - NC */ PAD_NC(GPP_E5, UP_20K), @@ -542,11 +542,11 @@ static const struct pad_config gpio_table[] = { /* GPP_E8 - SATALED# */ PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1), - /* GPP_E9 - RESERVED */ - PAD_CFG_NF(GPP_E9, NONE, DEEP, NF5), + /* GPP_E9 - USB2_OC0# */ + PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), - /* GPP_E10 - RESERVED */ - PAD_CFG_NF(GPP_E10, NONE, DEEP, NF5), + /* GPP_E10 - USB2_OC1# */ + PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1), /* GPP_E11 - USB2_OC2# */ PAD_CFG_NF(GPP_E11, NONE, DEEP, NF1), |