Rename hardwaremain() to main()

... and drop the wrapper on ARMv7

Change-Id: If3ffe953cee9e61d4dcbb38f4e5e2ca74b628ccc
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3639
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

20 files changed, 15 insertions, 84 deletions

diff --git a/src/mainboard/amd/dinar/get_bus_conf.c b/src/mainboard/amd/dinar/get_bus_conf.c
index 128a677e7f..a59bc437d3 100644
--- a/src/mainboard/amd/dinar/get_bus_conf.c
+++ b/src/mainboard/amd/dinar/get_bus_conf.c
@@ -83,7 +83,7 @@ void get_bus_conf(void)
 	 * call.  The logically correct place to call AmdInitLate is after PCI scan is done,
 	 * after the decision about S3 resume is made, and before the system tables are
 	 * written into RAM.  The routine that is responsible for writing the tables is
-	 * "write_tables", called near the end of "hardwaremain".  There is no platform
+	 * "write_tables", called near the end of "main".  There is no platform
 	 * specific entry point between the S3 resume decision point and the call to
 	 * "write_tables", and the next platform specific entry points are the calls to
 	 * the ACPI table write functions.  The first of ose would seem to be the right
diff --git a/src/mainboard/amd/inagua/get_bus_conf.c b/src/mainboard/amd/inagua/get_bus_conf.c
index d2c0b817f8..09e3b4ca02 100644
--- a/src/mainboard/amd/inagua/get_bus_conf.c
+++ b/src/mainboard/amd/inagua/get_bus_conf.c
@@ -71,7 +71,7 @@ void get_bus_conf(void)
 	 * call.  The logically correct place to call AmdInitLate is after PCI scan is done,
 	 * after the decision about S3 resume is made, and before the system tables are
 	 * written into RAM.  The routine that is responsible for writing the tables is
-	 * "write_tables", called near the end of "hardwaremain".  There is no platform
+	 * "write_tables", called near the end of "main".  There is no platform
 	 * specific entry point between the S3 resume decision point and the call to
 	 * "write_tables", and the next platform specific entry points are the calls to
 	 * the ACPI table write functions.  The first of ose would seem to be the right
diff --git a/src/mainboard/amd/parmer/get_bus_conf.c b/src/mainboard/amd/parmer/get_bus_conf.c
index 3ae4c18195..d1be8b6268 100644
--- a/src/mainboard/amd/parmer/get_bus_conf.c
+++ b/src/mainboard/amd/parmer/get_bus_conf.c
@@ -69,7 +69,7 @@ void get_bus_conf(void)
 	 * call.  The logically correct place to call AmdInitLate is after PCI scan is done,
 	 * after the decision about S3 resume is made, and before the system tables are
 	 * written into RAM.  The routine that is responsible for writing the tables is
-	 * "write_tables", called near the end of "hardwaremain".  There is no platform
+	 * "write_tables", called near the end of "main".  There is no platform
 	 * specific entry point between the S3 resume decision point and the call to
 	 * "write_tables", and the next platform specific entry points are the calls to
 	 * the ACPI table write functions.  The first of ose would seem to be the right
diff --git a/src/mainboard/amd/persimmon/get_bus_conf.c b/src/mainboard/amd/persimmon/get_bus_conf.c
index 11ec26e16e..8872bb5a1c 100644
--- a/src/mainboard/amd/persimmon/get_bus_conf.c
+++ b/src/mainboard/amd/persimmon/get_bus_conf.c
@@ -74,7 +74,7 @@ void get_bus_conf(void)
  * call.	The logically correct place to call AmdInitLate is after PCI scan is done,
  * after the decision about S3 resume is made, and before the system tables are
  * written into RAM.	The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain".	There is no platform
+ * "write_tables", called near the end of "main".	There is no platform
  * specific entry point between the S3 resume decision point and the call to
  * "write_tables", and the next platform specific entry points are the calls to
  * the ACPI table write functions.	The first of ose would seem to be the right
diff --git a/src/mainboard/amd/south_station/get_bus_conf.c b/src/mainboard/amd/south_station/get_bus_conf.c
index cbe19d83b6..165c683d86 100644
--- a/src/mainboard/amd/south_station/get_bus_conf.c
+++ b/src/mainboard/amd/south_station/get_bus_conf.c
@@ -71,7 +71,7 @@ void get_bus_conf(void)
  * call.  The logically correct place to call AmdInitLate is after PCI scan is done,
  * after the decision about S3 resume is made, and before the system tables are
  * written into RAM.  The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain".  There is no platform
+ * "write_tables", called near the end of "main".  There is no platform
  * specific entry point between the S3 resume decision point and the call to
  * "write_tables", and the next platform specific entry points are the calls to
  * the ACPI table write functions.  The first of ose would seem to be the right
diff --git a/src/mainboard/amd/thatcher/get_bus_conf.c b/src/mainboard/amd/thatcher/get_bus_conf.c
index 3ae4c18195..d1be8b6268 100644
--- a/src/mainboard/amd/thatcher/get_bus_conf.c
+++ b/src/mainboard/amd/thatcher/get_bus_conf.c
@@ -69,7 +69,7 @@ void get_bus_conf(void)
 	 * call.  The logically correct place to call AmdInitLate is after PCI scan is done,
 	 * after the decision about S3 resume is made, and before the system tables are
 	 * written into RAM.  The routine that is responsible for writing the tables is
-	 * "write_tables", called near the end of "hardwaremain".  There is no platform
+	 * "write_tables", called near the end of "main".  There is no platform
 	 * specific entry point between the S3 resume decision point and the call to
 	 * "write_tables", and the next platform specific entry points are the calls to
 	 * the ACPI table write functions.  The first of ose would seem to be the right
diff --git a/src/mainboard/amd/torpedo/get_bus_conf.c b/src/mainboard/amd/torpedo/get_bus_conf.c
index e2bd54edf2..4444937d57 100644
--- a/src/mainboard/amd/torpedo/get_bus_conf.c
+++ b/src/mainboard/amd/torpedo/get_bus_conf.c
@@ -76,7 +76,7 @@ void get_bus_conf(void)
  * call.  The logically correct place to call AmdInitLate is after PCI scan is done,
  * after the decision about S3 resume is made, and before the system tables are
  * written into RAM.  The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain".  There is no platform
+ * "write_tables", called near the end of "main".  There is no platform
  * specific entry point between the S3 resume decision point and the call to
  * "write_tables", and the next platform specific entry points are the calls to
  * the ACPI table write functions.  The first of ose would seem to be the right
diff --git a/src/mainboard/amd/union_station/get_bus_conf.c b/src/mainboard/amd/union_station/get_bus_conf.c
index cbe19d83b6..165c683d86 100644
--- a/src/mainboard/amd/union_station/get_bus_conf.c
+++ b/src/mainboard/amd/union_station/get_bus_conf.c
@@ -71,7 +71,7 @@ void get_bus_conf(void)
  * call.  The logically correct place to call AmdInitLate is after PCI scan is done,
  * after the decision about S3 resume is made, and before the system tables are
  * written into RAM.  The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain".  There is no platform
+ * "write_tables", called near the end of "main".  There is no platform
  * specific entry point between the S3 resume decision point and the call to
  * "write_tables", and the next platform specific entry points are the calls to
  * the ACPI table write functions.  The first of ose would seem to be the right
diff --git a/src/mainboard/asrock/e350m1/get_bus_conf.c b/src/mainboard/asrock/e350m1/get_bus_conf.c
index cbe19d83b6..165c683d86 100644
--- a/src/mainboard/asrock/e350m1/get_bus_conf.c
+++ b/src/mainboard/asrock/e350m1/get_bus_conf.c
@@ -71,7 +71,7 @@ void get_bus_conf(void)
  * call.  The logically correct place to call AmdInitLate is after PCI scan is done,
  * after the decision about S3 resume is made, and before the system tables are
  * written into RAM.  The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain".  There is no platform
+ * "write_tables", called near the end of "main".  There is no platform
  * specific entry point between the S3 resume decision point and the call to
  * "write_tables", and the next platform specific entry points are the calls to
  * the ACPI table write functions.  The first of ose would seem to be the right
diff --git a/src/mainboard/asus/f2a85-m/get_bus_conf.c b/src/mainboard/asus/f2a85-m/get_bus_conf.c
index 3ae4c18195..d1be8b6268 100644
--- a/src/mainboard/asus/f2a85-m/get_bus_conf.c
+++ b/src/mainboard/asus/f2a85-m/get_bus_conf.c
@@ -69,7 +69,7 @@ void get_bus_conf(void)
 	 * call.  The logically correct place to call AmdInitLate is after PCI scan is done,
 	 * after the decision about S3 resume is made, and before the system tables are
 	 * written into RAM.  The routine that is responsible for writing the tables is
-	 * "write_tables", called near the end of "hardwaremain".  There is no platform
+	 * "write_tables", called near the end of "main".  There is no platform
 	 * specific entry point between the S3 resume decision point and the call to
 	 * "write_tables", and the next platform specific entry points are the calls to
 	 * the ACPI table write functions.  The first of ose would seem to be the right
diff --git a/src/mainboard/emulation/qemu-armv7/Makefile.inc b/src/mainboard/emulation/qemu-armv7/Makefile.inc
index 80b392b11e..46ecfed9cd 100644
--- a/src/mainboard/emulation/qemu-armv7/Makefile.inc
+++ b/src/mainboard/emulation/qemu-armv7/Makefile.inc
@@ -13,7 +13,6 @@
 ## GNU General Public License for more details.
 
 romstage-y += romstage.c
-ramstage-y += ramstage.c
 
 bootblock-y += media.c
 romstage-y += media.c
diff --git a/src/mainboard/emulation/qemu-armv7/ramstage.c b/src/mainboard/emulation/qemu-armv7/ramstage.c
deleted file mode 100644
index 32e6cab95a..0000000000
--- a/src/mainboard/emulation/qemu-armv7/ramstage.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2013 Google, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-void hardwaremain(void);
-void main(void)
-{
-	hardwaremain();
-}
diff --git a/src/mainboard/google/snow/Makefile.inc b/src/mainboard/google/snow/Makefile.inc
index 190bb36154..69bc9ba97b 100644
--- a/src/mainboard/google/snow/Makefile.inc
+++ b/src/mainboard/google/snow/Makefile.inc
@@ -25,5 +25,4 @@ romstage-y += wakeup.c
 
 # ramstage-y += ec.c
 ramstage-y += mainboard.c
-ramstage-y += ramstage.c
 ramstage-y += chromeos.c
diff --git a/src/mainboard/google/snow/ramstage.c b/src/mainboard/google/snow/ramstage.c
deleted file mode 100644
index 6aa6082fcf..0000000000
--- a/src/mainboard/google/snow/ramstage.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright (C) 2013 The ChromeOS Authors
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-void hardwaremain(void);
-void main(void)
-{
-	hardwaremain();
-}
diff --git a/src/mainboard/lippert/frontrunner-af/get_bus_conf.c b/src/mainboard/lippert/frontrunner-af/get_bus_conf.c
index 11ec26e16e..8872bb5a1c 100644
--- a/src/mainboard/lippert/frontrunner-af/get_bus_conf.c
+++ b/src/mainboard/lippert/frontrunner-af/get_bus_conf.c
@@ -74,7 +74,7 @@ void get_bus_conf(void)
  * call.	The logically correct place to call AmdInitLate is after PCI scan is done,
  * after the decision about S3 resume is made, and before the system tables are
  * written into RAM.	The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain".	There is no platform
+ * "write_tables", called near the end of "main".	There is no platform
  * specific entry point between the S3 resume decision point and the call to
  * "write_tables", and the next platform specific entry points are the calls to
  * the ACPI table write functions.	The first of ose would seem to be the right
diff --git a/src/mainboard/lippert/toucan-af/get_bus_conf.c b/src/mainboard/lippert/toucan-af/get_bus_conf.c
index 11ec26e16e..8872bb5a1c 100644
--- a/src/mainboard/lippert/toucan-af/get_bus_conf.c
+++ b/src/mainboard/lippert/toucan-af/get_bus_conf.c
@@ -74,7 +74,7 @@ void get_bus_conf(void)
  * call.	The logically correct place to call AmdInitLate is after PCI scan is done,
  * after the decision about S3 resume is made, and before the system tables are
  * written into RAM.	The routine that is responsible for writing the tables is
- * "write_tables", called near the end of "hardwaremain".	There is no platform
+ * "write_tables", called near the end of "main".	There is no platform
  * specific entry point between the S3 resume decision point and the call to
  * "write_tables", and the next platform specific entry points are the calls to
  * the ACPI table write functions.	The first of ose would seem to be the right
diff --git a/src/mainboard/supermicro/h8qgi/get_bus_conf.c b/src/mainboard/supermicro/h8qgi/get_bus_conf.c
index ffaa81be78..25dc2a2b38 100644
--- a/src/mainboard/supermicro/h8qgi/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8qgi/get_bus_conf.c
@@ -64,7 +64,7 @@ void get_bus_conf(void)
 	 * call.  The logically correct place to call AmdInitLate is after PCI scan is done,
 	 * after the decision about S3 resume is made, and before the system tables are
 	 * written into RAM.  The routine that is responsible for writing the tables is
-	 * "write_tables", called near the end of "hardwaremain".  There is no platform
+	 * "write_tables", called near the end of "main".  There is no platform
 	 * specific entry point between the S3 resume decision point and the call to
 	 * "write_tables", and the next platform specific entry points are the calls to
 	 * the ACPI table write functions.  The first of ose would seem to be the right
diff --git a/src/mainboard/supermicro/h8scm/get_bus_conf.c b/src/mainboard/supermicro/h8scm/get_bus_conf.c
index eff9504690..4b2cb32fa2 100644
--- a/src/mainboard/supermicro/h8scm/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8scm/get_bus_conf.c
@@ -64,7 +64,7 @@ void get_bus_conf(void)
 	 * call.  The logically correct place to call AmdInitLate is after PCI scan is done,
 	 * after the decision about S3 resume is made, and before the system tables are
 	 * written into RAM.  The routine that is responsible for writing the tables is
-	 * "write_tables", called near the end of "hardwaremain".  There is no platform
+	 * "write_tables", called near the end of "main".  There is no platform
 	 * specific entry point between the S3 resume decision point and the call to
 	 * "write_tables", and the next platform specific entry points are the calls to
 	 * the ACPI table write functions.  The first of ose would seem to be the right
diff --git a/src/mainboard/ti/beaglebone/mainboard.c b/src/mainboard/ti/beaglebone/mainboard.c
deleted file mode 100644
index 1717be4369..0000000000
--- a/src/mainboard/ti/beaglebone/mainboard.c
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/* FIXME: this is a stub */
-void main(void)
-{
-}
diff --git a/src/mainboard/tyan/s8226/get_bus_conf.c b/src/mainboard/tyan/s8226/get_bus_conf.c
index 5c119f2657..d45e1ad354 100644
--- a/src/mainboard/tyan/s8226/get_bus_conf.c
+++ b/src/mainboard/tyan/s8226/get_bus_conf.c
@@ -63,7 +63,7 @@ void get_bus_conf(void)
 	 * call.  The logically correct place to call AmdInitLate is after PCI scan is done,
 	 * after the decision about S3 resume is made, and before the system tables are
 	 * written into RAM.  The routine that is responsible for writing the tables is
-	 * "write_tables", called near the end of "hardwaremain".  There is no platform
+	 * "write_tables", called near the end of "main".  There is no platform
 	 * specific entry point between the S3 resume decision point and the call to
 	 * "write_tables", and the next platform specific entry points are the calls to
 	 * the ACPI table write functions.  The first of ose would seem to be the right