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authorarch import user (historical) <svn@openbios.org>2005-07-06 17:00:18 +0000
committerarch import user (historical) <svn@openbios.org>2005-07-06 17:00:18 +0000
commit708023cdea14f2b92a88c582f57fee138c5e8ea2 (patch)
tree60ae28cee336d58717947acee0e6c3d342296baf /src/mainboard
parentc8c720a80138af945f8f5b7fa9d0c6400f23fc9a (diff)
downloadcoreboot-708023cdea14f2b92a88c582f57fee138c5e8ea2.tar.xz
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-19
Creator: Ronald G. Minnich <rminnich@lanl.gov> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1935 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/digitallogic/msm586seg/Config.lb132
-rw-r--r--src/mainboard/digitallogic/msm586seg/Options.lb109
-rw-r--r--src/mainboard/digitallogic/msm586seg/auto.c118
-rw-r--r--src/mainboard/digitallogic/msm586seg/chip.h5
-rw-r--r--src/mainboard/digitallogic/msm586seg/cmos.layout74
-rw-r--r--src/mainboard/digitallogic/msm586seg/debug.c0
-rw-r--r--src/mainboard/digitallogic/msm586seg/failover.c32
-rw-r--r--src/mainboard/digitallogic/msm586seg/irq_tables.c32
-rw-r--r--src/mainboard/digitallogic/msm586seg/mainboard.c11
-rw-r--r--src/mainboard/digitallogic/msm586seg/reset.c41
10 files changed, 554 insertions, 0 deletions
diff --git a/src/mainboard/digitallogic/msm586seg/Config.lb b/src/mainboard/digitallogic/msm586seg/Config.lb
new file mode 100644
index 0000000000..effb4c2813
--- /dev/null
+++ b/src/mainboard/digitallogic/msm586seg/Config.lb
@@ -0,0 +1,132 @@
+##
+## Compute the location and size of where this firmware image
+## (linuxBIOS plus bootloader) will live in the boot rom chip.
+##
+if USE_FALLBACK_IMAGE
+ default ROM_SECTION_SIZE = FALLBACK_SIZE
+ default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
+else
+ default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
+ default ROM_SECTION_OFFSET = 0
+end
+
+##
+## Compute the start location and size size of
+## The linuxBIOS bootloader.
+##
+default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
+default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
+
+##
+## Compute where this copy of linuxBIOS will start in the boot rom
+##
+default _ROMBASE = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
+
+##
+## Compute a range of ROM that can cached to speed up linuxBIOS,
+## execution speed.
+##
+## XIP_ROM_SIZE must be a power of 2.
+## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
+##
+default XIP_ROM_SIZE=65536
+default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
+
+##
+## Set all of the defaults for an x86 architecture
+##
+
+arch i386 end
+
+##
+## Build the objects we have code for in this directory.
+##
+
+driver mainboard.o
+if HAVE_PIRQ_TABLE object irq_tables.o end
+#object reset.o
+
+##
+## Romcc output
+##
+makerule ./failover.E
+ depends "$(MAINBOARD)/failover.c ./romcc"
+ action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
+end
+
+makerule ./failover.inc
+ depends "$(MAINBOARD)/failover.c ./romcc"
+ action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
+end
+
+makerule ./auto.E
+ depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
+ action "./romcc -E -mcpu=p3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+end
+makerule ./auto.inc
+ depends "$(MAINBOARD)/auto.c option_table.h ./romcc"
+ action "./romcc -mcpu=p3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
+end
+
+##
+## Build our 16 bit and 32 bit linuxBIOS entry code
+##
+mainboardinit cpu/x86/16bit/entry16.inc
+mainboardinit cpu/x86/32bit/entry32.inc
+ldscript /cpu/x86/16bit/entry16.lds
+ldscript /cpu/x86/32bit/entry32.lds
+
+##
+## Build our reset vector (This is where linuxBIOS is entered)
+##
+if USE_FALLBACK_IMAGE
+ mainboardinit cpu/x86/16bit/reset16.inc
+ ldscript /cpu/x86/16bit/reset16.lds
+else
+ mainboardinit cpu/x86/32bit/reset32.inc
+ ldscript /cpu/x86/32bit/reset32.lds
+end
+
+### Should this be in the northbridge code?
+mainboardinit arch/i386/lib/cpu_reset.inc
+
+##
+## Include an id string (For safe flashing)
+##
+mainboardinit arch/i386/lib/id.inc
+ldscript /arch/i386/lib/id.lds
+
+###
+### This is the early phase of linuxBIOS startup
+### Things are delicate and we test to see if we should
+### failover to another image.
+###
+if USE_FALLBACK_IMAGE
+ ldscript /arch/i386/lib/failover.lds
+ mainboardinit ./failover.inc
+end
+
+###
+### O.k. We aren't just an intermediary anymore!
+###
+
+##
+## Setup RAM
+##
+mainboardinit cpu/x86/fpu/enable_fpu.inc
+mainboardinit ./auto.inc
+
+##
+## Include the secondary Configuration files
+##
+dir /pc80
+config chip.h
+
+chip cpu/amd/sc520
+ device pci_domain 0 on
+ device pci 0.0 on end
+ device pci 1.0 on end
+# register "com1" = "{1}"
+# register "com1" = "{1, 0, 0x3f8, 4}"
+ end
+end
diff --git a/src/mainboard/digitallogic/msm586seg/Options.lb b/src/mainboard/digitallogic/msm586seg/Options.lb
new file mode 100644
index 0000000000..91e8ef0a13
--- /dev/null
+++ b/src/mainboard/digitallogic/msm586seg/Options.lb
@@ -0,0 +1,109 @@
+uses HAVE_MP_TABLE
+uses HAVE_PIRQ_TABLE
+uses USE_FALLBACK_IMAGE
+uses HAVE_FALLBACK_BOOT
+uses HAVE_HARD_RESET
+uses HAVE_OPTION_TABLE
+uses USE_OPTION_TABLE
+uses CONFIG_ROM_STREAM
+uses IRQ_SLOT_COUNT
+uses MAINBOARD
+uses MAINBOARD_VENDOR
+uses MAINBOARD_PART_NUMBER
+uses LINUXBIOS_EXTRA_VERSION
+uses ARCH
+uses FALLBACK_SIZE
+uses STACK_SIZE
+uses HEAP_SIZE
+uses ROM_SIZE
+uses ROM_SECTION_SIZE
+uses ROM_IMAGE_SIZE
+uses ROM_SECTION_SIZE
+uses ROM_SECTION_OFFSET
+uses CONFIG_ROM_STREAM_START
+uses PAYLOAD_SIZE
+uses _ROMBASE
+uses _RAMBASE
+uses XIP_ROM_SIZE
+uses XIP_ROM_BASE
+uses HAVE_MP_TABLE
+uses CROSS_COMPILE
+uses CC
+uses HOSTCC
+uses OBJCOPY
+
+uses DEFAULT_CONSOLE_LOGLEVEL
+uses MAXIMUM_CONSOLE_LOGLEVEL
+default DEFAULT_CONSOLE_LOGLEVEL=9
+default MAXIMUM_CONSOLE_LOGLEVEL=9
+## ROM_SIZE is the size of boot ROM that this board will use.
+default ROM_SIZE = 256*1024
+
+###
+### Build options
+###
+
+##
+## Build code for the fallback boot
+##
+default HAVE_FALLBACK_BOOT=1
+
+##
+## no MP table
+##
+default HAVE_MP_TABLE=0
+
+##
+## Build code to reset the motherboard from linuxBIOS
+##
+default HAVE_HARD_RESET=1
+
+##
+## Build code to export a programmable irq routing table
+##
+default HAVE_PIRQ_TABLE=1
+default IRQ_SLOT_COUNT=5
+#object irq_tables.o
+
+##
+## Build code to export a CMOS option table
+##
+default HAVE_OPTION_TABLE=1
+
+###
+### LinuxBIOS layout values
+###
+
+## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
+default ROM_IMAGE_SIZE = 65536
+default FALLBACK_SIZE = 131072
+
+##
+## Use a small 8K stack
+##
+default STACK_SIZE=0x2000
+
+##
+## Use a small 16K heap
+##
+default HEAP_SIZE=0x4000
+
+##
+## Only use the option table in a normal image
+##
+#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
+default USE_OPTION_TABLE = 0
+
+default _RAMBASE = 0x00004000
+
+default CONFIG_ROM_STREAM = 1
+
+##
+## The default compiler
+##
+default CC="$(CROSS_COMPILE)gcc -m32"
+default HOSTCC="gcc"
+
+end
+
+
diff --git a/src/mainboard/digitallogic/msm586seg/auto.c b/src/mainboard/digitallogic/msm586seg/auto.c
new file mode 100644
index 0000000000..961f5481ee
--- /dev/null
+++ b/src/mainboard/digitallogic/msm586seg/auto.c
@@ -0,0 +1,118 @@
+#define ASSEMBLY 1
+#define ASM_CONSOLE_LOGLEVEL 8
+#include <stdint.h>
+#include <device/pci_def.h>
+#include <arch/io.h>
+#include <device/pnp_def.h>
+#include <arch/romcc_io.h>
+#include <arch/hlt.h>
+#include "pc80/mc146818rtc_early.c"
+#include "pc80/serial.c"
+#include "arch/i386/lib/console.c"
+#include "ram/ramtest.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
+#include "cpu/x86/bist.h"
+#include "cpu/amd/sc520/raminit.c"
+
+
+static void hard_reset(void)
+{
+}
+
+static void memreset_setup(void)
+{
+}
+
+static void memreset(int controllers, const struct mem_controller *ctrl)
+{
+}
+
+
+
+static inline void activate_spd_rom(const struct mem_controller *ctrl)
+{
+ /* nothing to do */
+}
+
+static inline int spd_read_byte(unsigned device, unsigned address)
+{
+ return smbus_read_byte(device, address);
+}
+
+#include "sdram/generic_sdram.c"
+
+static void main(unsigned long bist)
+{
+ static const struct mem_controller memctrl[] = {
+ {
+ .d0 = PCI_DEV(0, 0, 0),
+ .channel0 = { (0xa<<3)|0, 0 },
+ },
+ };
+
+ if (bist == 0) {
+ early_mtrr_init();
+ }
+
+ uart_init();
+ console_init();
+
+
+ /* Halt if there was a built in self test failure */
+ report_bist_failure(bist);
+
+
+#if 0
+ print_pci_devices();
+#endif
+
+ if(!bios_reset_detected()) {
+ enable_smbus();
+#if 0
+ dump_spd_registers(&memctrl[0]);
+ // dump_smbus_registers();
+#endif
+
+
+ memreset_setup();
+
+ sdram_initialize(sizeof(memctrl)/sizeof(memctrl[0]), memctrl);
+
+ }
+#if 0
+ else {
+ /* clear memory 1meg */
+ __asm__ volatile(
+ "1: \n\t"
+ "movl %0, %%fs:(%1)\n\t"
+ "addl $4,%1\n\t"
+ "subl $4,%2\n\t"
+ "jnz 1b\n\t"
+ :
+ : "a" (0), "D" (0), "c" (1024*1024)
+ );
+
+ }
+#endif
+
+#if 0
+ dump_pci_devices();
+#endif
+#if 0
+ dump_pci_device(PCI_DEV(0, 0, 0));
+#endif
+
+/*
+#if 0
+ ram_check(0x00000000, msr.lo+(msr.hi<<32));
+#else
+#if 0
+ // Check 16MB of memory @ 0
+ ram_check(0x00000000, 0x01000000);
+#else
+ // Check 16MB of memory @ 2GB
+ ram_check(0x80000000, 0x81000000);
+#endif
+#endif
+*/
+}
diff --git a/src/mainboard/digitallogic/msm586seg/chip.h b/src/mainboard/digitallogic/msm586seg/chip.h
new file mode 100644
index 0000000000..fa064d48f3
--- /dev/null
+++ b/src/mainboard/digitallogic/msm586seg/chip.h
@@ -0,0 +1,5 @@
+extern struct chip_operations mainboard_digitallogic_msm586seg_ops;
+
+struct mainboard_digitallogic_msm586seg_config {
+
+};
diff --git a/src/mainboard/digitallogic/msm586seg/cmos.layout b/src/mainboard/digitallogic/msm586seg/cmos.layout
new file mode 100644
index 0000000000..5ba4c032c1
--- /dev/null
+++ b/src/mainboard/digitallogic/msm586seg/cmos.layout
@@ -0,0 +1,74 @@
+entries
+
+#start-bit length config config-ID name
+#0 8 r 0 seconds
+#8 8 r 0 alarm_seconds
+#16 8 r 0 minutes
+#24 8 r 0 alarm_minutes
+#32 8 r 0 hours
+#40 8 r 0 alarm_hours
+#48 8 r 0 day_of_week
+#56 8 r 0 day_of_month
+#64 8 r 0 month
+#72 8 r 0 year
+#80 4 r 0 rate_select
+#84 3 r 0 REF_Clock
+#87 1 r 0 UIP
+#88 1 r 0 auto_switch_DST
+#89 1 r 0 24_hour_mode
+#90 1 r 0 binary_values_enable
+#91 1 r 0 square-wave_out_enable
+#92 1 r 0 update_finished_enable
+#93 1 r 0 alarm_interrupt_enable
+#94 1 r 0 periodic_interrupt_enable
+#95 1 r 0 disable_clock_updates
+#96 288 r 0 temporary_filler
+0 384 r 0 reserved_memory
+384 1 e 4 boot_option
+385 1 e 4 last_boot
+386 1 e 1 ECC_memory
+388 4 r 0 reboot_bits
+392 3 e 5 baud_rate
+400 1 e 1 power_on_after_fail
+412 4 e 6 debug_level
+416 4 e 7 boot_first
+420 4 e 7 boot_second
+424 4 e 7 boot_third
+428 4 h 0 boot_index
+432 8 h 0 boot_countdown
+1008 16 h 0 check_sum
+
+enumerations
+
+#ID value text
+1 0 Disable
+1 1 Enable
+2 0 Enable
+2 1 Disable
+4 0 Fallback
+4 1 Normal
+5 0 115200
+5 1 57600
+5 2 38400
+5 3 19200
+5 4 9600
+5 5 4800
+5 6 2400
+5 7 1200
+6 6 Notice
+6 7 Info
+6 8 Debug
+6 9 Spew
+7 0 Network
+7 1 HDD
+7 2 Floppy
+7 8 Fallback_Network
+7 9 Fallback_HDD
+7 10 Fallback_Floppy
+#7 3 ROM
+
+checksums
+
+checksum 392 1007 1008
+
+
diff --git a/src/mainboard/digitallogic/msm586seg/debug.c b/src/mainboard/digitallogic/msm586seg/debug.c
new file mode 100644
index 0000000000..e69de29bb2
--- /dev/null
+++ b/src/mainboard/digitallogic/msm586seg/debug.c
diff --git a/src/mainboard/digitallogic/msm586seg/failover.c b/src/mainboard/digitallogic/msm586seg/failover.c
new file mode 100644
index 0000000000..bdcb9eaed2
--- /dev/null
+++ b/src/mainboard/digitallogic/msm586seg/failover.c
@@ -0,0 +1,32 @@
+#define ASSEMBLY 1
+#include <stdint.h>
+#include <device/pci_def.h>
+#include <device/pci_ids.h>
+#include <arch/io.h>
+#include "arch/romcc_io.h"
+#include "pc80/mc146818rtc_early.c"
+
+static unsigned long main(unsigned long bist)
+{
+ /* This is the primary cpu how should I boot? */
+ if (do_normal_boot()) {
+ goto normal_image;
+ }
+ else {
+ goto fallback_image;
+ }
+ normal_image:
+ asm volatile ("jmp __normal_image"
+ : /* outputs */
+ : "a" (bist) /* inputs */
+ : /* clobbers */
+ );
+ cpu_reset:
+ asm volatile ("jmp __cpu_reset"
+ : /* outputs */
+ : "a"(bist) /* inputs */
+ : /* clobbers */
+ );
+ fallback_image:
+ return bist;
+}
diff --git a/src/mainboard/digitallogic/msm586seg/irq_tables.c b/src/mainboard/digitallogic/msm586seg/irq_tables.c
new file mode 100644
index 0000000000..894c27dec5
--- /dev/null
+++ b/src/mainboard/digitallogic/msm586seg/irq_tables.c
@@ -0,0 +1,32 @@
+/* This file was generated by getpir.c, do not modify!
+ (but if you do, please run checkpir on it to verify)
+ Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
+
+ Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
+*/
+
+#include <arch/pirq_routing.h>
+
+const struct irq_routing_table intel_irq_routing_table = {
+ PIRQ_SIGNATURE, /* u32 signature */
+ PIRQ_VERSION, /* u16 version */
+ 32+16*5, /* there can be total 5 devices on the bus */
+ 0, /* Where the interrupt router lies (bus) */
+ 0x88, /* Where the interrupt router lies (dev) */
+ 0x1c20, /* IRQs devoted exclusively to PCI usage */
+ 0x1106, /* Vendor */
+ 0x8231, /* Device */
+ 0, /* Crap (miniport) */
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
+ 0x5e, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
+ {
+ /* 8231 ethernet */
+ {0,0x90, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x1, 0},
+ /* 8231 internal */
+ {0,0x88, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x2, 0},
+ /* PCI slot */
+ {0,0xa0, {{0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}}, 0, 0},
+ {0,0x50, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x3, 0},
+ {0,0x98, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x4, 0},
+ }
+};
diff --git a/src/mainboard/digitallogic/msm586seg/mainboard.c b/src/mainboard/digitallogic/msm586seg/mainboard.c
new file mode 100644
index 0000000000..2c64a1393c
--- /dev/null
+++ b/src/mainboard/digitallogic/msm586seg/mainboard.c
@@ -0,0 +1,11 @@
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include "chip.h"
+
+struct chip_operations mainboard_digitallogic_msm586seg_ops = {
+ CHIP_NAME("Digital Logic MSM586SEG mainboard ")
+};
+
diff --git a/src/mainboard/digitallogic/msm586seg/reset.c b/src/mainboard/digitallogic/msm586seg/reset.c
new file mode 100644
index 0000000000..f332b3f6a3
--- /dev/null
+++ b/src/mainboard/digitallogic/msm586seg/reset.c
@@ -0,0 +1,41 @@
+#if 0
+//#include "arch/romcc_io.h"
+#include <arch/io.h>
+
+typedef unsigned device_t;
+
+#define PCI_DEV(BUS, DEV, FN) ( \
+ (((BUS) & 0xFF) << 16) | \
+ (((DEV) & 0x1f) << 11) | \
+ (((FN) & 0x7) << 8))
+
+static void pci_write_config8(device_t dev, unsigned where, unsigned char value)
+{
+ unsigned addr;
+ addr = dev | where;
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ outb(value, 0xCFC + (addr & 3));
+}
+
+static void pci_write_config32(device_t dev, unsigned where, unsigned value)
+{
+ unsigned addr;
+ addr = dev | where;
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ outl(value, 0xCFC);
+}
+
+static unsigned pci_read_config32(device_t dev, unsigned where)
+{
+ unsigned addr;
+ addr = dev | where;
+ outl(0x80000000 | (addr & ~3), 0xCF8);
+ return inl(0xCFC);
+}
+
+void hard_reset(void)
+{
+ set_bios_reset();
+ // pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1);
+}
+#endif