summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
authorVladimir Serbinenko <phcoder@gmail.com>2014-02-05 19:10:03 +0100
committerVladimir Serbinenko <phcoder@gmail.com>2014-02-05 20:11:35 +0100
commit79c712cb9e35ea9c0f383c047b4aa9590b64496d (patch)
tree29735d60cf6b6f3fc7bc1daf6d1fee23eca81a76 /src/mainboard
parent3fcde22a30fc26fa299d4e26a9cc0bde7eb0356d (diff)
downloadcoreboot-79c712cb9e35ea9c0f383c047b4aa9590b64496d.tar.xz
lenovo/x201: Enable flash prefetching.
Speeds up coreboot and especially payload load. Before: 90:load payload 4,530,979 (17,728) 99:selfboot jump 5,103,408 (572,429) After: 90:load payload 4,390,051 (14,849) 99:selfboot jump 4,505,966 (115,915) Change-Id: I45c3042594cda16ab3adde6472e00ec1b2d2a688 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5145 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/lenovo/x201/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index e3e0a628f8..f0874d3fab 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -63,7 +63,7 @@ static void pch_enable_lpc(void)
pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x10);
pci_write_config32(PCH_LPC_DEV, 0xd0, 0x0);
- pci_write_config32(PCH_LPC_DEV, 0xdc, 0x0);
+ pci_write_config32(PCH_LPC_DEV, 0xdc, 0x8);
pci_write_config8(PCH_LPC_DEV, GEN_PMCON_3,
(pci_read_config8(PCH_LPC_DEV, GEN_PMCON_3) & ~2) | 1);