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author | Tony Huang <tony-huang@quanta.corp-partner.google.com> | 2021-01-04 16:24:13 +0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-07 08:15:28 +0000 |
commit | 8a1e2e1765f204454b78c7ad53be68edb8d5c18a (patch) | |
tree | 5c4752541fbccb783dad17dc68fcbd0327fc5803 /src/mainboard | |
parent | 6b284569a80f904ed7b813e302ff968bd344c40b (diff) | |
download | coreboot-8a1e2e1765f204454b78c7ad53be68edb8d5c18a.tar.xz |
mb/google/puff/var/dooly: Config I2C0 SerialIoDevMode
I2C0 has amplifier connection, thus set it to PchSerialIoPci.
BUG=b:170273526
BRANCH=puff
TEST=Build and check PCH serial IO config is set I2C0 to Mode 1
Change-Id: I9540f7b5538d37de53bcf43531488d714874a565
Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sam McNally <sammc@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/google/hatch/variants/dooly/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/hatch/variants/dooly/overridetree.cb b/src/mainboard/google/hatch/variants/dooly/overridetree.cb index 45c43cc98c..69d142886b 100644 --- a/src/mainboard/google/hatch/variants/dooly/overridetree.cb +++ b/src/mainboard/google/hatch/variants/dooly/overridetree.cb @@ -9,7 +9,7 @@ chip soc/intel/cannonlake register "TetonGlacierMode" = "1" register "SerialIoDevMode" = "{ - [PchSerialIoIndexI2C0] = PchSerialIoDisabled, + [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoDisabled, [PchSerialIoIndexI2C2] = PchSerialIoPci, [PchSerialIoIndexI2C3] = PchSerialIoPci, |