diff options
author | Aaron Durbin <adurbin@chromium.org> | 2014-06-30 16:42:13 -0500 |
---|---|---|
committer | Marc Jones <marc.jones@se-eng.com> | 2015-03-04 18:25:52 +0100 |
commit | 8ddc1f328ad2c6071c5c3dc126ec04f4e2e4a927 (patch) | |
tree | d87398d00cb0a1a2437a754d3b39f6190581d3da /src/mainboard | |
parent | 0e69639909ff4e1d824781b7404461b07ea29942 (diff) | |
download | coreboot-8ddc1f328ad2c6071c5c3dc126ec04f4e2e4a927.tar.xz |
rush: enable 128MiB MTS carveout below top of DRAM
The recommended settings for the size of the MTS region is 128MiB.
Therefore, provide this region 128MiB below the top of DRAM for
each configuration.
BUG=chrome-os-partner:29922
BRANCH=None
TEST=Built and noted MTS carveout region at expected location.
Original-Change-Id: Iac17f210dfef8e8a36617c7b3dceba8c2134ee9b
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/206291
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit f1758c74330afe9dd7eaa8ff1fef5e4d18ed14ad)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I369a3897e31f3126d031d3582f52f9892350f658
Reviewed-on: http://review.coreboot.org/8579
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/mainboard')
4 files changed, 11 insertions, 11 deletions
diff --git a/src/mainboard/google/rush/bct/sdram-hynix-2GB-792.inc b/src/mainboard/google/rush/bct/sdram-hynix-2GB-792.inc index d175e7b4e4..60bf4168f7 100644 --- a/src/mainboard/google/rush/bct/sdram-hynix-2GB-792.inc +++ b/src/mainboard/google/rush/bct/sdram-hynix-2GB-792.inc @@ -304,8 +304,8 @@ .SwizzleRankByteEncode = 0x0000006f, .BootRomPatchControl = 0x00000000, .BootRomPatchData = 0x00000000, - .McMtsCarveoutBom = 0xfff00000, + .McMtsCarveoutBom = 0xf8000000, .McMtsCarveoutAdrHi = 0x00000000, - .McMtsCarveoutSizeMb = 0x00000000, - .McMtsCarveoutRegCtrl = 0x00000000, + .McMtsCarveoutSizeMb = 0x00000080, + .McMtsCarveoutRegCtrl = 0x00000001, }, diff --git a/src/mainboard/google/rush/bct/sdram-hynix-2GB-924.inc b/src/mainboard/google/rush/bct/sdram-hynix-2GB-924.inc index b10a696447..44d77cb4d9 100644 --- a/src/mainboard/google/rush/bct/sdram-hynix-2GB-924.inc +++ b/src/mainboard/google/rush/bct/sdram-hynix-2GB-924.inc @@ -304,8 +304,8 @@ .SwizzleRankByteEncode = 0x0000006f, .BootRomPatchControl = 0x00000000, .BootRomPatchData = 0x00000000, - .McMtsCarveoutBom = 0xfff00000, + .McMtsCarveoutBom = 0xf8000000, .McMtsCarveoutAdrHi = 0x00000000, - .McMtsCarveoutSizeMb = 0x00000000, - .McMtsCarveoutRegCtrl = 0x00000000, + .McMtsCarveoutSizeMb = 0x00000080, + .McMtsCarveoutRegCtrl = 0x00000001, }, diff --git a/src/mainboard/google/rush/bct/sdram-hynix-4GB-300.inc b/src/mainboard/google/rush/bct/sdram-hynix-4GB-300.inc index 21bf5158a0..62b067f8c4 100644 --- a/src/mainboard/google/rush/bct/sdram-hynix-4GB-300.inc +++ b/src/mainboard/google/rush/bct/sdram-hynix-4GB-300.inc @@ -307,5 +307,5 @@ .McMtsCarveoutBom = 0x78000000, .McMtsCarveoutAdrHi = 0x00000001, .McMtsCarveoutSizeMb = 0x00000080, - .McMtsCarveoutRegCtrl = 0x00000000, + .McMtsCarveoutRegCtrl = 0x00000001, }, diff --git a/src/mainboard/google/rush/bct/sdram-hynix-4GB-792.inc b/src/mainboard/google/rush/bct/sdram-hynix-4GB-792.inc index 70f6ccd02b..7e5f66688e 100644 --- a/src/mainboard/google/rush/bct/sdram-hynix-4GB-792.inc +++ b/src/mainboard/google/rush/bct/sdram-hynix-4GB-792.inc @@ -304,8 +304,8 @@ .SwizzleRankByteEncode = 0x0000006f, .BootRomPatchControl = 0x00000000, .BootRomPatchData = 0x00000000, - .McMtsCarveoutBom = 0xfff00000, - .McMtsCarveoutAdrHi = 0x00000000, - .McMtsCarveoutSizeMb = 0x00000000, - .McMtsCarveoutRegCtrl = 0x00000000, + .McMtsCarveoutBom = 0x78000000, + .McMtsCarveoutAdrHi = 0x00000001, + .McMtsCarveoutSizeMb = 0x00000080, + .McMtsCarveoutRegCtrl = 0x00000001, }, |