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| author | John Zhao <john.zhao@intel.com> | 2020-08-14 21:18:27 -0700 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-08-18 15:57:50 +0000 |
| commit | 90e56267cf158af3d692b709f7f41120130234a4 (patch) | |
| tree | ebdb95dd9a905662fae56065a28f87cc442b0f58 /src/mainboard | |
| parent | aa902036d0cc8dd48a36fd7cf5fd8e22930b7afd (diff) | |
| download | coreboot-90e56267cf158af3d692b709f7f41120130234a4.tar.xz | |
mb/google/volteer: Configure DP_HPD as PAD_NC and disable DdiPortHpd
GPP_A19(DP_HPD1) and GPP_A20(DP_HPD2) were configured native function
(NF1) without internal pull-down which wrongly presents HPD interrupts.
DP_HPD had been removed for EVT design as those events are through eSPI.
This change configures GPP_A19 and GPP_A20 to be no connection and
disables DdiPort1Hpd and DdiPort2Hpd.
BUG=b:162566436
TEST=Booted to kernel and verified no kernel HPD pins assertion message
on Volteer EVT board.
Signed-off-by: John Zhao <john.zhao@intel.com>
Change-Id: Ia3245741b776b75073d2b43d36c8ea40b476b3ed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44501
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/volteer/variants/volteer2/gpio.c | 4 | ||||
| -rw-r--r-- | src/mainboard/google/volteer/variants/volteer2/overridetree.cb | 2 |
2 files changed, 4 insertions, 2 deletions
diff --git a/src/mainboard/google/volteer/variants/volteer2/gpio.c b/src/mainboard/google/volteer/variants/volteer2/gpio.c index 09a4dd5a8b..7b14646fd5 100644 --- a/src/mainboard/google/volteer/variants/volteer2/gpio.c +++ b/src/mainboard/google/volteer/variants/volteer2/gpio.c @@ -19,9 +19,9 @@ static const struct pad_config override_gpio_table[] = { /* A18 : DDSP_HPDB ==> HDMI_HPD */ PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), /* A19 : DDSP_HPD1 ==> USB_C0_DP_HPD */ - PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), + PAD_NC(GPP_A19, NONE), /* A20 : DDSP_HPD2 ==> USB_C1_DP_HPD */ - PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1), + PAD_NC(GPP_A20, NONE), /* A21 : DDPC_CTRCLK ==> EN_FP_PWR */ PAD_CFG_GPO(GPP_A21, 1, DEEP), /* A22 : DDPC_CTRLDATA ==> EN_HDMI_PWR */ diff --git a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb index 76a5b87f3e..3036a48f21 100644 --- a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb @@ -2,6 +2,8 @@ chip soc/intel/tigerlake register "TcssAuxOri" = "1" register "IomTypeCPortPadCfg[0]" = "0x090E000A" register "IomTypeCPortPadCfg[1]" = "0x090E000D" + register "DdiPort1Hpd" = "0" + register "DdiPort2Hpd" = "0" device domain 0 on device pci 15.0 on |