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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-01-03 11:38:37 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-01-04 17:20:08 +0000
commita2cfe9e90001fe11f7c7653c9917ea75dd082333 (patch)
treeb84bfda6b4278f37a38f57d3313128ea575843f2 /src/mainboard
parentd482c7dace772278d988682e94247e3801587ff7 (diff)
downloadcoreboot-a2cfe9e90001fe11f7c7653c9917ea75dd082333.tar.xz
amdfam10 boards: Add Makefiles and fix resourcemap.c
Also remove global ramstage-y += get_bus_conf.c, this is specific to amdfam10. Change-Id: I49b604ebff6bcfe85518b2c3896ab798c3c7878d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30629 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/advansus/a785e-i/Makefile.inc16
-rw-r--r--src/mainboard/advansus/a785e-i/resourcemap.c6
-rw-r--r--src/mainboard/advansus/a785e-i/romstage.c1
-rw-r--r--src/mainboard/amd/bimini_fam10/Makefile.inc16
-rw-r--r--src/mainboard/amd/bimini_fam10/resourcemap.c6
-rw-r--r--src/mainboard/amd/bimini_fam10/romstage.c1
-rw-r--r--src/mainboard/amd/mahogany_fam10/Makefile.inc16
-rw-r--r--src/mainboard/amd/mahogany_fam10/resourcemap.c6
-rw-r--r--src/mainboard/amd/mahogany_fam10/romstage.c1
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc4
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c6
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/romstage.c1
-rw-r--r--src/mainboard/amd/tilapia_fam10/Makefile.inc16
-rw-r--r--src/mainboard/amd/tilapia_fam10/resourcemap.c6
-rw-r--r--src/mainboard/amd/tilapia_fam10/romstage.c1
-rw-r--r--src/mainboard/asus/kcma-d8/Makefile.inc16
-rw-r--r--src/mainboard/asus/kcma-d8/resourcemap.c6
-rw-r--r--src/mainboard/asus/kcma-d8/romstage.c1
-rw-r--r--src/mainboard/asus/kfsn4-dre/Makefile.inc16
-rw-r--r--src/mainboard/asus/kfsn4-dre/resourcemap.c6
-rw-r--r--src/mainboard/asus/kfsn4-dre/romstage.c1
-rw-r--r--src/mainboard/asus/kgpe-d16/Makefile.inc16
-rw-r--r--src/mainboard/asus/kgpe-d16/resourcemap.c6
-rw-r--r--src/mainboard/asus/kgpe-d16/romstage.c1
-rw-r--r--src/mainboard/asus/m4a78-em/Makefile.inc16
-rw-r--r--src/mainboard/asus/m4a78-em/resourcemap.c6
-rw-r--r--src/mainboard/asus/m4a78-em/romstage.c1
-rw-r--r--src/mainboard/asus/m4a785-m/Makefile.inc16
-rw-r--r--src/mainboard/asus/m4a785-m/resourcemap.c6
-rw-r--r--src/mainboard/asus/m4a785-m/romstage.c1
-rw-r--r--src/mainboard/asus/m4a785t-m/Makefile.inc16
-rw-r--r--src/mainboard/asus/m5a88-v/Makefile.inc16
-rw-r--r--src/mainboard/asus/m5a88-v/resourcemap.c6
-rw-r--r--src/mainboard/asus/m5a88-v/romstage.c1
-rw-r--r--src/mainboard/avalue/eax-785e/Makefile.inc16
-rw-r--r--src/mainboard/avalue/eax-785e/resourcemap.c6
-rw-r--r--src/mainboard/avalue/eax-785e/romstage.c1
-rw-r--r--src/mainboard/gigabyte/ma785gm/Makefile.inc16
-rw-r--r--src/mainboard/gigabyte/ma785gm/resourcemap.c6
-rw-r--r--src/mainboard/gigabyte/ma785gm/romstage.c1
-rw-r--r--src/mainboard/gigabyte/ma785gmt/Makefile.inc16
-rw-r--r--src/mainboard/gigabyte/ma785gmt/resourcemap.c6
-rw-r--r--src/mainboard/gigabyte/ma785gmt/romstage.c1
-rw-r--r--src/mainboard/gigabyte/ma78gm/Makefile.inc16
-rw-r--r--src/mainboard/gigabyte/ma78gm/resourcemap.c6
-rw-r--r--src/mainboard/gigabyte/ma78gm/romstage.c1
-rw-r--r--src/mainboard/hp/dl165_g6_fam10/Makefile.inc14
-rw-r--r--src/mainboard/iei/kino-780am2-fam10/Makefile.inc16
-rw-r--r--src/mainboard/iei/kino-780am2-fam10/resourcemap.c6
-rw-r--r--src/mainboard/iei/kino-780am2-fam10/romstage.c1
-rw-r--r--src/mainboard/jetway/pa78vm5/Makefile.inc16
-rw-r--r--src/mainboard/jetway/pa78vm5/resourcemap.c6
-rw-r--r--src/mainboard/jetway/pa78vm5/romstage.c1
-rw-r--r--src/mainboard/msi/ms9652_fam10/Makefile.inc16
-rw-r--r--src/mainboard/msi/ms9652_fam10/resourcemap.c6
-rw-r--r--src/mainboard/msi/ms9652_fam10/romstage.c1
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/Makefile.inc16
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/resourcemap.c6
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/romstage.c1
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/Makefile.inc16
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/resourcemap.c6
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/romstage.c1
-rw-r--r--src/mainboard/supermicro/h8scm_fam10/Makefile.inc16
-rw-r--r--src/mainboard/supermicro/h8scm_fam10/resourcemap.c6
-rw-r--r--src/mainboard/supermicro/h8scm_fam10/romstage.c1
-rw-r--r--src/mainboard/tyan/s2912_fam10/Makefile.inc16
-rw-r--r--src/mainboard/tyan/s2912_fam10/resourcemap.c6
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c1
68 files changed, 478 insertions, 46 deletions
diff --git a/src/mainboard/advansus/a785e-i/Makefile.inc b/src/mainboard/advansus/a785e-i/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/advansus/a785e-i/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/advansus/a785e-i/resourcemap.c b/src/mainboard/advansus/a785e-i/resourcemap.c
index 19181fb2a9..8390f49504 100644
--- a/src/mainboard/advansus/a785e-i/resourcemap.c
+++ b/src/mainboard/advansus/a785e-i/resourcemap.c
@@ -13,7 +13,11 @@
* GNU General Public License for more details.
*/
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/advansus/a785e-i/romstage.c b/src/mainboard/advansus/a785e-i/romstage.c
index c63c2feb35..f9ea822c7f 100644
--- a/src/mainboard/advansus/a785e-i/romstage.c
+++ b/src/mainboard/advansus/a785e-i/romstage.c
@@ -46,7 +46,6 @@
#include <arch/early_variables.h>
#include <cbmem.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#include "spd.h"
diff --git a/src/mainboard/amd/bimini_fam10/Makefile.inc b/src/mainboard/amd/bimini_fam10/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/amd/bimini_fam10/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/amd/bimini_fam10/resourcemap.c b/src/mainboard/amd/bimini_fam10/resourcemap.c
index b647f48129..ce4351f8eb 100644
--- a/src/mainboard/amd/bimini_fam10/resourcemap.c
+++ b/src/mainboard/amd/bimini_fam10/resourcemap.c
@@ -13,7 +13,11 @@
* GNU General Public License for more details.
*/
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c
index 6c40f6e036..3d86b60afc 100644
--- a/src/mainboard/amd/bimini_fam10/romstage.c
+++ b/src/mainboard/amd/bimini_fam10/romstage.c
@@ -45,7 +45,6 @@
#include "southbridge/amd/sb800/early_setup.c"
#include <spd.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
void activate_spd_rom(const struct mem_controller *ctrl);
diff --git a/src/mainboard/amd/mahogany_fam10/Makefile.inc b/src/mainboard/amd/mahogany_fam10/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/amd/mahogany_fam10/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/amd/mahogany_fam10/resourcemap.c b/src/mainboard/amd/mahogany_fam10/resourcemap.c
index acdf645a54..a4a1d9251a 100644
--- a/src/mainboard/amd/mahogany_fam10/resourcemap.c
+++ b/src/mainboard/amd/mahogany_fam10/resourcemap.c
@@ -15,7 +15,11 @@
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c
index ef7afdeb71..b0d23b2dec 100644
--- a/src/mainboard/amd/mahogany_fam10/romstage.c
+++ b/src/mainboard/amd/mahogany_fam10/romstage.c
@@ -51,7 +51,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
void activate_spd_rom(const struct mem_controller *ctrl);
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc b/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
index e826e8153a..c9a38fab7e 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
@@ -2,3 +2,7 @@ $(eval $(call asl_template,ssdt2))
$(eval $(call asl_template,ssdt3))
$(eval $(call asl_template,ssdt4))
$(eval $(call asl_template,ssdt5))
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c b/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c
index 0e47c52784..2a2380a3f9 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c
@@ -13,7 +13,11 @@
* GNU General Public License for more details.
*/
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
index fcb10b1daa..03d3484105 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
@@ -44,7 +44,6 @@
#include "southbridge/amd/amd8111/early_smbus.c"
#include "southbridge/amd/amd8111/early_ctrl.c"
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
diff --git a/src/mainboard/amd/tilapia_fam10/Makefile.inc b/src/mainboard/amd/tilapia_fam10/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/amd/tilapia_fam10/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/amd/tilapia_fam10/resourcemap.c b/src/mainboard/amd/tilapia_fam10/resourcemap.c
index 5a4381424a..37b6d20797 100644
--- a/src/mainboard/amd/tilapia_fam10/resourcemap.c
+++ b/src/mainboard/amd/tilapia_fam10/resourcemap.c
@@ -13,7 +13,11 @@
* GNU General Public License for more details.
*/
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c
index 0001f93260..50c7a002dd 100644
--- a/src/mainboard/amd/tilapia_fam10/romstage.c
+++ b/src/mainboard/amd/tilapia_fam10/romstage.c
@@ -47,7 +47,6 @@
#include <spd.h>
#include <southbridge/amd/rs780/rs780.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)
diff --git a/src/mainboard/asus/kcma-d8/Makefile.inc b/src/mainboard/asus/kcma-d8/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/asus/kcma-d8/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/asus/kcma-d8/resourcemap.c b/src/mainboard/asus/kcma-d8/resourcemap.c
index 5e66c56251..0edc3d1364 100644
--- a/src/mainboard/asus/kcma-d8/resourcemap.c
+++ b/src/mainboard/asus/kcma-d8/resourcemap.c
@@ -17,9 +17,11 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
-static void setup_mb_resource_map(void)
+void setup_mb_resource_map(void)
{
static const unsigned int fam15h_register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/asus/kcma-d8/romstage.c b/src/mainboard/asus/kcma-d8/romstage.c
index 12c0926f87..caff4dfd1c 100644
--- a/src/mainboard/asus/kcma-d8/romstage.c
+++ b/src/mainboard/asus/kcma-d8/romstage.c
@@ -46,7 +46,6 @@
#include <arch/early_variables.h>
#include <cbmem.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_0_DEV PNP_DEV(0x2e, W83667HG_A_SP1)
diff --git a/src/mainboard/asus/kfsn4-dre/Makefile.inc b/src/mainboard/asus/kfsn4-dre/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/asus/kfsn4-dre/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/asus/kfsn4-dre/resourcemap.c b/src/mainboard/asus/kfsn4-dre/resourcemap.c
index 9644201da4..3591488199 100644
--- a/src/mainboard/asus/kfsn4-dre/resourcemap.c
+++ b/src/mainboard/asus/kfsn4-dre/resourcemap.c
@@ -17,7 +17,11 @@
* GNU General Public License for more details.
*/
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c
index b93372c372..99d437f9be 100644
--- a/src/mainboard/asus/kfsn4-dre/romstage.c
+++ b/src/mainboard/asus/kfsn4-dre/romstage.c
@@ -45,7 +45,6 @@
#include <northbridge/amd/amdfam10/raminit.h>
#include <cpu/amd/family_10h-family_15h/init_cpus.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
diff --git a/src/mainboard/asus/kgpe-d16/Makefile.inc b/src/mainboard/asus/kgpe-d16/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/asus/kgpe-d16/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/asus/kgpe-d16/resourcemap.c b/src/mainboard/asus/kgpe-d16/resourcemap.c
index 6d6e556183..b3c4465f87 100644
--- a/src/mainboard/asus/kgpe-d16/resourcemap.c
+++ b/src/mainboard/asus/kgpe-d16/resourcemap.c
@@ -17,9 +17,11 @@
* GNU General Public License for more details.
*/
-#include <arch/cpu.h>
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
-static void setup_mb_resource_map(void)
+void setup_mb_resource_map(void)
{
static const unsigned int fam15h_register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index 31ba25192c..59ad0263f7 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -46,7 +46,6 @@
#include <arch/early_variables.h>
#include <cbmem.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_0_DEV PNP_DEV(0x2e, W83667HG_A_SP1)
diff --git a/src/mainboard/asus/m4a78-em/Makefile.inc b/src/mainboard/asus/m4a78-em/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/asus/m4a78-em/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/asus/m4a78-em/resourcemap.c b/src/mainboard/asus/m4a78-em/resourcemap.c
index acdf645a54..a4a1d9251a 100644
--- a/src/mainboard/asus/m4a78-em/resourcemap.c
+++ b/src/mainboard/asus/m4a78-em/resourcemap.c
@@ -15,7 +15,11 @@
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c
index 3175a02755..87a5d77d74 100644
--- a/src/mainboard/asus/m4a78-em/romstage.c
+++ b/src/mainboard/asus/m4a78-em/romstage.c
@@ -48,7 +48,6 @@
#include <spd.h>
#include <southbridge/amd/rs780/rs780.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
diff --git a/src/mainboard/asus/m4a785-m/Makefile.inc b/src/mainboard/asus/m4a785-m/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/asus/m4a785-m/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/asus/m4a785-m/resourcemap.c b/src/mainboard/asus/m4a785-m/resourcemap.c
index acdf645a54..a4a1d9251a 100644
--- a/src/mainboard/asus/m4a785-m/resourcemap.c
+++ b/src/mainboard/asus/m4a785-m/resourcemap.c
@@ -15,7 +15,11 @@
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c
index 8dbaefa21d..02c396f93a 100644
--- a/src/mainboard/asus/m4a785-m/romstage.c
+++ b/src/mainboard/asus/m4a785-m/romstage.c
@@ -49,7 +49,6 @@
#include <spd.h>
#include <southbridge/amd/rs780/rs780.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
diff --git a/src/mainboard/asus/m4a785t-m/Makefile.inc b/src/mainboard/asus/m4a785t-m/Makefile.inc
new file mode 100644
index 0000000000..7b6cdb0d73
--- /dev/null
+++ b/src/mainboard/asus/m4a785t-m/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += ../m4a785-m/resourcemap.c
+
+ramstage-y += ../m4a785-m/get_bus_conf.c
diff --git a/src/mainboard/asus/m5a88-v/Makefile.inc b/src/mainboard/asus/m5a88-v/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/asus/m5a88-v/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/asus/m5a88-v/resourcemap.c b/src/mainboard/asus/m5a88-v/resourcemap.c
index 2987b7c8fc..94ada1e867 100644
--- a/src/mainboard/asus/m5a88-v/resourcemap.c
+++ b/src/mainboard/asus/m5a88-v/resourcemap.c
@@ -13,7 +13,11 @@
* GNU General Public License for more details.
*/
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c
index 3ad33ec862..4c2687f0c0 100644
--- a/src/mainboard/asus/m5a88-v/romstage.c
+++ b/src/mainboard/asus/m5a88-v/romstage.c
@@ -48,7 +48,6 @@
#include "southbridge/amd/sb800/early_setup.c"
#include "spd.h"
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_DEV PNP_DEV(0x4e, IT8721F_SP1)
diff --git a/src/mainboard/avalue/eax-785e/Makefile.inc b/src/mainboard/avalue/eax-785e/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/avalue/eax-785e/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/avalue/eax-785e/resourcemap.c b/src/mainboard/avalue/eax-785e/resourcemap.c
index 19181fb2a9..8390f49504 100644
--- a/src/mainboard/avalue/eax-785e/resourcemap.c
+++ b/src/mainboard/avalue/eax-785e/resourcemap.c
@@ -13,7 +13,11 @@
* GNU General Public License for more details.
*/
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/avalue/eax-785e/romstage.c b/src/mainboard/avalue/eax-785e/romstage.c
index 85ff722f59..88cb7844c3 100644
--- a/src/mainboard/avalue/eax-785e/romstage.c
+++ b/src/mainboard/avalue/eax-785e/romstage.c
@@ -46,7 +46,6 @@
#include <southbridge/amd/rs780/rs780.h>
#include <southbridge/amd/sb800/early_setup.c>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
diff --git a/src/mainboard/gigabyte/ma785gm/Makefile.inc b/src/mainboard/gigabyte/ma785gm/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/gigabyte/ma785gm/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/gigabyte/ma785gm/resourcemap.c b/src/mainboard/gigabyte/ma785gm/resourcemap.c
index acdf645a54..a4a1d9251a 100644
--- a/src/mainboard/gigabyte/ma785gm/resourcemap.c
+++ b/src/mainboard/gigabyte/ma785gm/resourcemap.c
@@ -15,7 +15,11 @@
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/gigabyte/ma785gm/romstage.c b/src/mainboard/gigabyte/ma785gm/romstage.c
index 3a777f2adb..2a0a54b276 100644
--- a/src/mainboard/gigabyte/ma785gm/romstage.c
+++ b/src/mainboard/gigabyte/ma785gm/romstage.c
@@ -45,7 +45,6 @@
#include <spd.h>
#include <southbridge/amd/rs780/rs780.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)
diff --git a/src/mainboard/gigabyte/ma785gmt/Makefile.inc b/src/mainboard/gigabyte/ma785gmt/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/gigabyte/ma785gmt/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/gigabyte/ma785gmt/resourcemap.c b/src/mainboard/gigabyte/ma785gmt/resourcemap.c
index acdf645a54..a4a1d9251a 100644
--- a/src/mainboard/gigabyte/ma785gmt/resourcemap.c
+++ b/src/mainboard/gigabyte/ma785gmt/resourcemap.c
@@ -15,7 +15,11 @@
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c
index d08e1e03ab..67cd4a8bd0 100644
--- a/src/mainboard/gigabyte/ma785gmt/romstage.c
+++ b/src/mainboard/gigabyte/ma785gmt/romstage.c
@@ -45,7 +45,6 @@
#include <spd.h>
#include <southbridge/amd/rs780/rs780.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)
diff --git a/src/mainboard/gigabyte/ma78gm/Makefile.inc b/src/mainboard/gigabyte/ma78gm/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/gigabyte/ma78gm/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/gigabyte/ma78gm/resourcemap.c b/src/mainboard/gigabyte/ma78gm/resourcemap.c
index acdf645a54..a4a1d9251a 100644
--- a/src/mainboard/gigabyte/ma78gm/resourcemap.c
+++ b/src/mainboard/gigabyte/ma78gm/resourcemap.c
@@ -15,7 +15,11 @@
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c
index 7e854980ec..191a391d0f 100644
--- a/src/mainboard/gigabyte/ma78gm/romstage.c
+++ b/src/mainboard/gigabyte/ma78gm/romstage.c
@@ -48,7 +48,6 @@
#include <cbmem.h>
#include <southbridge/amd/rs780/rs780.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1)
diff --git a/src/mainboard/hp/dl165_g6_fam10/Makefile.inc b/src/mainboard/hp/dl165_g6_fam10/Makefile.inc
new file mode 100644
index 0000000000..0fd5b079f5
--- /dev/null
+++ b/src/mainboard/hp/dl165_g6_fam10/Makefile.inc
@@ -0,0 +1,14 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/iei/kino-780am2-fam10/Makefile.inc b/src/mainboard/iei/kino-780am2-fam10/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/iei/kino-780am2-fam10/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/iei/kino-780am2-fam10/resourcemap.c b/src/mainboard/iei/kino-780am2-fam10/resourcemap.c
index acdf645a54..a4a1d9251a 100644
--- a/src/mainboard/iei/kino-780am2-fam10/resourcemap.c
+++ b/src/mainboard/iei/kino-780am2-fam10/resourcemap.c
@@ -15,7 +15,11 @@
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c
index 72146e7ef4..1a89343a13 100644
--- a/src/mainboard/iei/kino-780am2-fam10/romstage.c
+++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c
@@ -48,7 +48,6 @@
#include <cbmem.h>
#include <southbridge/amd/rs780/rs780.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_DEV PNP_DEV(0x2e, F71859_SP1)
diff --git a/src/mainboard/jetway/pa78vm5/Makefile.inc b/src/mainboard/jetway/pa78vm5/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/jetway/pa78vm5/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/jetway/pa78vm5/resourcemap.c b/src/mainboard/jetway/pa78vm5/resourcemap.c
index 58b681f197..da7fc1b0a2 100644
--- a/src/mainboard/jetway/pa78vm5/resourcemap.c
+++ b/src/mainboard/jetway/pa78vm5/resourcemap.c
@@ -16,7 +16,11 @@
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c
index 45ee1c2c27..0b2d1641ed 100644
--- a/src/mainboard/jetway/pa78vm5/romstage.c
+++ b/src/mainboard/jetway/pa78vm5/romstage.c
@@ -49,7 +49,6 @@
#include <cbmem.h>
#include <southbridge/amd/rs780/rs780.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#if CONFIG_TTYS0_BASE == 0x2f8
diff --git a/src/mainboard/msi/ms9652_fam10/Makefile.inc b/src/mainboard/msi/ms9652_fam10/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/msi/ms9652_fam10/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/msi/ms9652_fam10/resourcemap.c b/src/mainboard/msi/ms9652_fam10/resourcemap.c
index 825f5ae664..59155c6d23 100644
--- a/src/mainboard/msi/ms9652_fam10/resourcemap.c
+++ b/src/mainboard/msi/ms9652_fam10/resourcemap.c
@@ -15,7 +15,11 @@
* GNU General Public License for more details.
*/
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index 7caf6cde68..8b4350429a 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -44,7 +44,6 @@
#include <southbridge/amd/common/reset.h>
#include <southbridge/nvidia/mcp55/mcp55.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627EHG_SP1)
diff --git a/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc b/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c b/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c
index d4cbc93f47..7dc4df1fdb 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c
@@ -15,7 +15,11 @@
* GNU General Public License for more details.
*/
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index dea481fe18..838d7e2f09 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -45,7 +45,6 @@
#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#include <southbridge/nvidia/mcp55/early_setup_ss.h>
#include "southbridge/nvidia/mcp55/early_setup_car.c"
diff --git a/src/mainboard/supermicro/h8qme_fam10/Makefile.inc b/src/mainboard/supermicro/h8qme_fam10/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/supermicro/h8qme_fam10/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/supermicro/h8qme_fam10/resourcemap.c b/src/mainboard/supermicro/h8qme_fam10/resourcemap.c
index d4cbc93f47..7dc4df1fdb 100644
--- a/src/mainboard/supermicro/h8qme_fam10/resourcemap.c
+++ b/src/mainboard/supermicro/h8qme_fam10/resourcemap.c
@@ -15,7 +15,11 @@
* GNU General Public License for more details.
*/
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index 127b76f0a2..660610eb33 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -44,7 +44,6 @@
#include <cbmem.h>
#include <southbridge/nvidia/mcp55/mcp55.h> // for enable the FAN
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#include <southbridge/nvidia/mcp55/early_setup_ss.h>
#include "southbridge/nvidia/mcp55/early_setup_car.c"
diff --git a/src/mainboard/supermicro/h8scm_fam10/Makefile.inc b/src/mainboard/supermicro/h8scm_fam10/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/supermicro/h8scm_fam10/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/supermicro/h8scm_fam10/resourcemap.c b/src/mainboard/supermicro/h8scm_fam10/resourcemap.c
index acdf645a54..a4a1d9251a 100644
--- a/src/mainboard/supermicro/h8scm_fam10/resourcemap.c
+++ b/src/mainboard/supermicro/h8scm_fam10/resourcemap.c
@@ -15,7 +15,11 @@
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c
index 0ad12188d1..23d47b4e2f 100644
--- a/src/mainboard/supermicro/h8scm_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c
@@ -47,7 +47,6 @@
#include <arch/early_variables.h>
#include <cbmem.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
void activate_spd_rom(const struct mem_controller *ctrl);
diff --git a/src/mainboard/tyan/s2912_fam10/Makefile.inc b/src/mainboard/tyan/s2912_fam10/Makefile.inc
new file mode 100644
index 0000000000..91d4b39c32
--- /dev/null
+++ b/src/mainboard/tyan/s2912_fam10/Makefile.inc
@@ -0,0 +1,16 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+romstage-y += resourcemap.c
+
+ramstage-y += get_bus_conf.c
diff --git a/src/mainboard/tyan/s2912_fam10/resourcemap.c b/src/mainboard/tyan/s2912_fam10/resourcemap.c
index 10c97f59da..f02d6a766d 100644
--- a/src/mainboard/tyan/s2912_fam10/resourcemap.c
+++ b/src/mainboard/tyan/s2912_fam10/resourcemap.c
@@ -15,7 +15,11 @@
* GNU General Public License for more details.
*/
-static void setup_mb_resource_map(void)
+#include <arch/io.h>
+#include <commonlib/helpers.h>
+#include <northbridge/amd/amdfam10/amdfam10.h>
+
+void setup_mb_resource_map(void)
{
static const unsigned int register_values[] = {
/* Careful set limit registers before base registers which contain the enables */
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 1734b3a77c..126724f6a2 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -44,7 +44,6 @@
#include <cbmem.h>
#include <southbridge/nvidia/mcp55/mcp55.h>
-#include "resourcemap.c"
#include "cpu/amd/quadcore/quadcore.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)