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author | Li-Ta Lo <ollie@lanl.gov> | 2006-04-26 22:07:16 +0000 |
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committer | Li-Ta Lo <ollie@lanl.gov> | 2006-04-26 22:07:16 +0000 |
commit | b7a09b4f19aa5e9d23118d32e523470e590318eb (patch) | |
tree | b9a53ab2f4647cf59d6c2201bc22804f748a822b /src/mainboard | |
parent | ae11b37ea54fc1716797a32223fc0a86aed3aab5 (diff) | |
download | coreboot-b7a09b4f19aa5e9d23118d32e523470e590318eb.tar.xz |
some todo and comment for ron.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2280 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/amd/rumba/auto.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/mainboard/amd/rumba/auto.c b/src/mainboard/amd/rumba/auto.c index f4c3344612..b3a9b839ee 100644 --- a/src/mainboard/amd/rumba/auto.c +++ b/src/mainboard/amd/rumba/auto.c @@ -104,13 +104,17 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl) #include "cpu/amd/model_gx2/syspreinit.c" static void msr_init(void) { + /* total physical memory */ __builtin_wrmsr(0x1808, 0x10f3bf00, 0x22fffc02); + /* traditional memory 0kB-512kB, 512kB-1MB */ __builtin_wrmsr(0x10000020, 0xfff80, 0x20000000); __builtin_wrmsr(0x10000021, 0x80fffe0, 0x20000000); __builtin_wrmsr(0x40000020, 0xfff80, 0x20000000); __builtin_wrmsr(0x40000021, 0x80fffe0, 0x20000000); + + /* put code in northbridge[init].c here */ } @@ -121,7 +125,7 @@ static void main(unsigned long bist) }; SystemPreInit(); - msr_init(); + w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE); uart_init(); @@ -136,6 +140,8 @@ static void main(unsigned long bist) sdram_initialize(1, memctrl); + msr_init(); + /* Check all of memory */ //ram_check(0x00000000, 640*1024); } |