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| author | Lucas Chen <lucas.chen@quanta.corp-partner.google.com> | 2018-08-14 16:06:56 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-20 15:59:15 +0000 |
| commit | cc11c97b70f3844d1f5707401a5d473c91f704ce (patch) | |
| tree | 035107be40ac6e7c4e55eee266b61a0ce32261c8 /src/mainboard | |
| parent | b54d15487ace81af9e3a1f9f64a509624bb5081d (diff) | |
| download | coreboot-cc11c97b70f3844d1f5707401a5d473c91f704ce.tar.xz | |
eve: Add PL1 override to 7W
Change PL1 from 4.5W to 7W, based on thermal test results.
BRANCH=eve
BUG=b:73133864
TEST=Verify the MSR PL1 limitation is set to 7W.
Change-Id: Ic3629f9c3b7eb6eef1a1b5a3051c9a11448bc9ad
Signed-off-by: Lucas Chen <lucas.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/28078
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/eve/devicetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index c1482c6296..e0ef3b0cef 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -242,6 +242,7 @@ chip soc/intel/skylake register "speed_shift_enable" = "1" register "dptf_enable" = "1" + register "tdp_pl1_override" = "7" register "tdp_pl2_override" = "15" register "tcc_offset" = "10" |